Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10032512 | Non-volatile semiconductor memory device | Makoto Senoo | 2018-07-24 |
| 10002646 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Sri Rama Namala | 2018-06-19 |
| 9870809 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Christophe J. Chevallier, Chang Hua Siau | 2018-01-16 |
| 9859000 | Apparatus for providing adjustable reference voltage for sensing read-out data for memory | Chi-Shun Lin, Ngatik Cheung, Douk-Hyoun Ryu, Koying Huang | 2018-01-02 |
| 9576652 | Resistive random access memory apparatus with forward and reverse reading modes | Johnny Chan, Douk-Hyoun Ryu, Chi-Shun Lin | 2017-02-21 |
| 9384806 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Christophe J. Chevallier, Chang Hua Siau | 2016-07-05 |
| 9129668 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Christophe J. Chevallier, Chang Hua Siau | 2015-09-08 |
| 8897050 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Sri Rama Namala | 2014-11-25 |
| 8854881 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Christophe J. Chevallier, Chang Hua Siau | 2014-10-07 |
| 8705260 | Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross point arrays | Christophe J. Chevallier, Chang Hua Siau | 2014-04-22 |
| 8665651 | Reference cell circuit and method of producing a reference current | Chi-Shun Lin, Ming-Huei Shieh | 2014-03-04 |
| 8427868 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Christophe J. Chevallier, Chang Hua Siau | 2013-04-23 |
| 8363443 | Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross-point arrays | Christophe J. Chevallier, Chang Hua Siau | 2013-01-29 |
| 8270193 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Sri Rama Namala | 2012-09-18 |