Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10032524 | Techniques for determining local interconnect defects | Jagdish Sabde, Jayavel Pachamuthu | 2018-07-24 |
| 9934872 | Erase stress and delta erase loop count methods for various fail modes in non-volatile memory | Jagdish Sabde, Jayavel Pachamuthu | 2018-04-03 |
| 9830998 | Stress patterns to detect shorts in three dimensional non-volatile memory | Jayavel Pachamuthu, Ankitkumar Babariya, Jagdish Sabde | 2017-11-28 |
| 9653175 | Determination of word line to word line shorts between adjacent blocks | Jagdish Sabde, Khanh Nguyen | 2017-05-16 |
| 9564219 | Current based detection and recording of memory hole-interconnect spacing defects | Jagdish Sabde, Jayavel Pachamuthu, Ankitkumar Babariya | 2017-02-07 |
| 9548129 | Word line look ahead read for word line to word line short detection | Rajan Paudel, Jagdish Sabde, Mrinal Kochar | 2017-01-17 |
| 9530514 | Select gate defect detection | Jagdish Sabde, Jayavel Pachamuthu | 2016-12-27 |
| 9514835 | Determination of word line to word line shorts between adjacent blocks | Jagdish Sabde, Khanh Nguyen | 2016-12-06 |
| 9496040 | Adaptive multi-page programming methods and apparatus for non-volatile memory | Rajan Paudel, Jagdish Sabde | 2016-11-15 |
| 9484086 | Determination of word line to local source line shorts | Jagdish Sabde | 2016-11-01 |
| 9460809 | AC stress mode to screen out word line to word line shorts | Jagdish Sabde | 2016-10-04 |
| 9449694 | Non-volatile memory with multi-word line select for defect detection operations | Rajan Paudel, Jagdish Sabde, Khanh Nguyen | 2016-09-20 |
| 9449698 | Block and zone erase algorithm for memory | Rajan Paudel, Jagdish Sabde | 2016-09-20 |
| 9443612 | Determination of bit line to low voltage signal shorts | Jagdish M. Sbade | 2016-09-13 |
| 9269446 | Methods to improve programming of slow cells | Jagdish Sabde, Jayavel Pachamuthu, Ankitkumar Babariya | 2016-02-23 |
| 9240249 | AC stress methods to screen out bit line defects | Jagdish Sabde, Jayavel Pachamuthu | 2016-01-19 |
| 9224502 | Techniques for detection and treating memory hole to local interconnect marginality defects | Jagdish Sabde, Jayavel Pachamuthu, Deepak Raghu | 2015-12-29 |
| 9202593 | Techniques for detecting broken word lines in non-volatile memories | Jagdish Sabde, Tien-Chien Kuo, Jayavel Pachamuthu | 2015-12-01 |
| 8710914 | Voltage regulators with improved wake-up response | Shankar Guhados, Sung-En Wang, Feng Pan, Jonathan Huynh | 2014-04-29 |