Issued Patents All Time
Showing 25 most recent of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10877907 | Multilevel memory bus system | Elsbeth Lauren Tagayo Villapana, Joel Alonzo Baylon | 2020-12-29 |
| 10552050 | Multi-dimensional computer storage system | Marlon B. Verdan | 2020-02-04 |
| 10489318 | Scatter-gather approach for parallel data transfer in a mass storage system | Avnher Villar Santos, Marlon B. Verdan, Elsbeth Lauren Tagayo Villapana | 2019-11-26 |
| 10459842 | Data storage system with configurable prefetch buffers | Rey H. Bruce, Marlon B. Verdan, Elsbeth Lauren Tagayo-Villapaña | 2019-10-29 |
| 10430303 | Bus arbitration with routing and failover mechanism | Cyrill C. Ponce, Jarmie Dela Cruz Espuerta, Marlon B. Verdan | 2019-10-01 |
| 10423554 | Bus arbitration with routing and failover mechanism | Cyrill C. Ponce, Jarmie Dela Cruz Espuerta | 2019-09-24 |
| 10133686 | Multilevel memory bus system | Elsbeth Lauren Tagayo Villapana, Joel Alonzo Baylon | 2018-11-20 |
| 10120586 | Memory transaction with reduced latency | Rey H. Bruce, Elsbeth Lauren Tagayo-Villapaña | 2018-11-06 |
| 10013373 | Multi-level message passing descriptor | Bernard Sherwin Leung Chiw, Margaret Anne Nadonga Somera | 2018-07-03 |
| 9971524 | Scatter-gather approach for parallel data transfer in a mass storage system | Avnher Villar Santos, Marlon B. Verdan, Elsbeth Lauren Tagayo Villapana | 2018-05-15 |
| 9952991 | Systematic method on queuing of descriptors for multiple flash intelligent DMA engine operation | Marlon B. Verdan, Rowenah Michelle Jago-on | 2018-04-24 |
| 9916213 | Bus arbitration with routing and failover mechanism | Cyrill C. Ponce, Jarmie De La Cruz Espuerta, Marlon B. Verdan | 2018-03-13 |
| 9875205 | Network of memory systems | Jarmie De La Cruz Espuerta, Marlon B. Verdan | 2018-01-23 |
| 9798688 | Bus arbitration with routing and failover mechanism | Cyrill C. Ponce, Jarmie Dela Cruz Espuerta | 2017-10-24 |
| 9501436 | Multi-level message passing descriptor | Bernard Sherwin Leung Chiw, Margaret Anne Nadonga Somera | 2016-11-22 |
| 9135190 | Multi-profile memory controller for computing devices | Marlon B. Verdan, Margaret Anne Nadonga Somera, Rowenah Michelle Jago-on, Maria Eliza B. De Belen, Ron Kelvin B. Palacol | 2015-09-15 |
| 8959307 | Reduced latency memory read transactions in storage devices | Rey H. Bruce, Elsbeth Lauren Tagayo-Villapaña | 2015-02-17 |
| 8788725 | Multilevel memory bus system for solid-state mass storage | Elsbeth Lauren Tagayo Villapana, Joel Alonzo Baylon | 2014-07-22 |
| 8447908 | Multilevel memory bus system for solid-state mass storage | Elsbeth Lauren Tagayo Villapana, Joel Alonzo Baylon | 2013-05-21 |
| 8093103 | Multiple chip module and package stacking method for storage devices | Rey H. Bruce, Patrick Digamon Bugayong, Joel Alonzo Baylon | 2012-01-10 |
| 7826243 | Multiple chip module and package stacking for storage devices | Rey H. Bruce, Patrick Digamon Bugayong, Joel Alonzo Baylon | 2010-11-02 |
| 7729370 | Apparatus for networking devices having fibre channel node functionality | Jairone A. Orcine | 2010-06-01 |
| 7620748 | Hardware assisted non-volatile memory-to-input/output direct memory access (DMA) transfer | Rey H. Bruce, Federico Zalzos Sambilay, Jr., Bernard Sherwin Leung Chiw | 2009-11-17 |
| 6981070 | Network storage device having solid-state non-volatile memory | Shun Hang Luk, Rey H. Bruce, Dave L. Bultman | 2005-12-27 |
| 6970890 | Method and apparatus for data recovery | Rolando H. Bruce | 2005-11-29 |