Issued Patents All Time
Showing 25 most recent of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12260092 | Systems and methods for generating logical-to-physical tables for wear-leveling | — | 2025-03-25 |
| 12174064 | Circuit for high-sensitivity radiation sensing | Ravi Kumar Adusumalli, Robert VAN ZEELAND, Rahul Thottathil | 2024-12-24 |
| 12167865 | Minimally invasive thrombectomy | Christopher J. Cooper, Mohammad H. Elahinia, Hamdy Ibrahim | 2024-12-17 |
| 11442631 | Memory operations with consideration for wear leveling | — | 2022-09-13 |
| 11419620 | Minimally invasive thrombectomy | Christopher J. Cooper, Mohammad H. Elahinia, Hamdy Ibrahim | 2022-08-23 |
| 11302703 | Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages | Kamal M. Karda, Chandra Mouli, Srinivas Pulugurtha | 2022-04-12 |
| 10914780 | Methods and apparatuses for threshold voltage measurement and related semiconductor devices and systems | Binoy Jose Panakkal | 2021-02-09 |
| 10886273 | Gated bipolar junction transistors, memory arrays, and methods of forming gated bipolar junction transistors | Farid Nemati, Scott Robins | 2021-01-05 |
| 10607988 | Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages | Kamal M. Karda, Chandra Mouli, Srinivas Pulugurtha | 2020-03-31 |
| 10381357 | Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages | Kamal M. Karda, Chandra Mouli, Srinivas Pulugurtha | 2019-08-13 |
| 10373956 | Gated bipolar junction transistors, memory arrays, and methods of forming gated bipolar junction transistors | Farid Nemati, Scott Robins | 2019-08-06 |
| 10242738 | Resistance variable element methods and apparatuses | Seshadri Kolluri | 2019-03-26 |
| 9842649 | Resistance variable element methods and apparatuses | Seshadri Kolluri | 2017-12-12 |
| 9761590 | Passing access line structure in a memory device | Srinivas Pulugurtha, Sourabh Dhir, Sanh D. Tang, Si-Woo Lee, Haitao Liu | 2017-09-12 |
| 9691465 | Thyristors, methods of programming thyristors, and methods of forming thyristors | Farid Nemati, Scott Robins | 2017-06-27 |
| 9577092 | Apparatuses having a vertical memory cell | Kamal M. Karda, Srinivas Pulugurtha, Chandra Mouli, Wolfgang Mueller | 2017-02-21 |
| 9520447 | Memory cells having a common gate terminal | Farid Nemati | 2016-12-13 |
| 9384814 | Thyristor memory and methods of operation | — | 2016-07-05 |
| 9373399 | Resistance variable element methods and apparatuses | Seshadri Kolluri | 2016-06-21 |
| 9361966 | Thyristors | Farid Nemati, Scott Robins | 2016-06-07 |
| 9349737 | Passing access line structure in a memory device | Srinivas Pulugurtha, Sourabh Dhir, Sanh D. Tang, Si-Woo Lee, Haitao Liu | 2016-05-24 |
| 9082494 | Memory cells having a common gate terminal | Farid Nemati | 2015-07-14 |
| 8952418 | Gated bipolar junction transistors | Farid Nemati, Scott Robins | 2015-02-10 |
| 8878271 | Vertical access device and apparatuses having a body connection line, and related method of operating the same | Kamal M. Karda, Srinivas Pulugurtha, Chandra Mouli, Wolfgang Mueller | 2014-11-04 |
| 8797794 | Thyristor memory and methods of operation | — | 2014-08-05 |