NR

Nalini Ranjan

SG S3 Group: 9 patents #1 of 130Top 1%
Overall (All Time): #588,061 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6393600 Skew-independent memory architecture Sarathy Sribhashyam, David Hoff 2002-05-21
6265899 Single rail domino logic for four-phase clocking scheme Saleh Abdel-Hafeez 2001-07-24
6208167 Voltage tolerant buffer Sarathy Sribhashyam 2001-03-27
6040737 Output buffer circuit and method that compensate for operating conditions and manufacturing processes Henry H. Yang 2000-03-21
6031258 High DC current stagger power/ground pad Henry H. Yang, Yi Wei, Gregg BARDEL 2000-02-29
6005412 AGP/DDR interfaces for full swing and reduced swing (SSTL) signals on an integrated circuit chip Xiaoyi Guo 1999-12-21
6005432 Voltage level shift system and method Xiaoyi Guo 1999-12-21
5862390 Mixed voltage, multi-rail, high drive, low noise, adjustable slew rate input/output buffer 1999-01-19
5852568 System and method for a fast carry/sum select adder 1998-12-22