Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6941532 | Clock skew verification methodology for grid-based design | Manishkumar B. Ankola, Ralf M. Schmitt, Anup K. Sharma, Stephan Hoerold, David M. Murata | 2005-09-06 |
| 6665845 | System and method for topology based noise estimation of submicron integrated circuit designs | Kathirqamar Aingaran, Stephan Hoerold, Farn Wang | 2003-12-16 |
| 6587815 | Windowing scheme for analyzing noise from multiple sources | Kathirgamar Aingaran, Lakshminarasimhan Varadadesikan | 2003-07-01 |