Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6311301 | System for efficient utilization of multiple test systems | Stig Oresjo, Patricia Monterio, Anne Elizabeth Dudfield | 2001-10-30 |
| 5544175 | Method and apparatus for the capturing and characterization of high-speed digital information | — | 1996-08-06 |
| 5513188 | Enhanced interconnect testing through utilization of board topology data | Kenneth P. Parker | 1996-04-30 |
| 5510704 | Powered testing of mixed conventional/boundary-scan logic | Kenneth P. Parker | 1996-04-23 |
| 5448166 | Powered testing of mixed conventional/boundary-scan logic | Kenneth P. Parker | 1995-09-05 |
| 5387862 | Powered testing of mixed conventional/boundary-scan logic | Kenneth P. Parker | 1995-02-07 |
| 5260649 | Powered testing of mixed conventional/boundary-scan logic | Kenneth P. Parker | 1993-11-09 |
| 5260947 | Boundary-scan test method and apparatus for diagnosing faults in a device under test | — | 1993-11-09 |
| 5237221 | On-chip pull-up circuit which may be selectively disabled | — | 1993-08-17 |
| 5001418 | Method for compressing data-vectors for a circuit board testing machine | Kevin W. Keirn, Michael A. Lassner, George L. Booth | 1991-03-19 |