Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12346594 | Background memory scan block selection | Alex J. Wesenberg, Michael Winterfeld | 2025-07-01 |
| 12265725 | Accelerated read translation path in memory sub-system | — | 2025-04-01 |
| 11995328 | Single-level cell block storing data for migration to multiple multi-level cell blocks | Nathaniel Wessel | 2024-05-28 |
| 11922011 | Virtual management unit scheme for two-pass programming in a memory sub-system | Samyukta Mudugal, Sanjay Subbarao, Byron D. Harris, Daniel A. Boals | 2024-03-05 |
| 11868643 | Background memory scan block selection | Alex J. Wesenberg, Michael Winterfeld | 2024-01-09 |
| 11868287 | Just-in-time (JIT) scheduler for memory subsystems | Alex J. Wesenberg, Guanying Wu, Sanjay Subbarao, Chandra M. Guda | 2024-01-09 |
| 11714562 | Journal scheme for two-pass programming memory devices | Sanjay Subbarao, Samyukta Mudugal | 2023-08-01 |
| 11681629 | Direct cache hit and transfer in a memory sub-system that programs sequentially | Chandra M. Guda | 2023-06-20 |
| 11683371 | Automotive network with centralized storage | Donna Yasay, Hubert Bailey, Noam Mizrahi | 2023-06-20 |
| 11640354 | Logical-to-physical mapping of data groups with data locality | Sanjay Subbarao, John E. Maroney, Mark Ish | 2023-05-02 |
| 11561855 | Error handling optimization in memory sub-system mapping | — | 2023-01-24 |
| 11537512 | Asynchronous power loss recovery for memory devices | Michael Winterfeld, Steven S. Williams, Alex J. Wesenberg | 2022-12-27 |
| 11461233 | Handling asynchronous power loss in a memory sub-system that programs sequentially | Alex J. Wesenberg, Michael Winterfeld | 2022-10-04 |
| 11347648 | Direct cache hit and transfer in a memory sub-system that programs sequentially | Chandra M. Guda | 2022-05-31 |
| 11314446 | Accelerated read translation path in memory sub-system | — | 2022-04-26 |
| 11249896 | Logical-to-physical mapping of data groups with data locality | Sanjay Subbarao, John E. Maroney, Mark Ish | 2022-02-15 |
| 11216364 | Sequential read optimization in a memory sub-system that programs sequentially | Chandra M. Guda | 2022-01-04 |
| 11210168 | Error handling optimization in memory sub-system mapping | — | 2021-12-28 |
| 11194709 | Asynchronous power loss recovery for memory devices | Michael Winterfeld, Steven S. Williams, Alex J. Wesenberg | 2021-12-07 |
| 10990526 | Handling asynchronous power loss in a memory sub-system that programs sequentially | Alex J. Wesenberg, Michael Winterfeld | 2021-04-27 |
| 10459635 | Window based mapping | Matthew Lewis Call, Frederick K. H. Lee, Stephen Silva | 2019-10-29 |
| 10169289 | Memory system and method for accelerating boot time | David Pignatelli, Michael S. Allison | 2019-01-01 |
| 10061696 | Partial garbage collection for fast error handling and optimized garbage collection for the invisible band | Justin Jones, Andrew Tomlin, Paul Marvin Sweazey, Rodney N. Mullendore | 2018-08-28 |
| 9678671 | System and method for dynamically adjusting garbage collection policies in solid-state memory | Ho-Fan Kang, Jerry Lo | 2017-06-13 |
| 9626118 | Efficient error handling mechanisms in data storage systems | — | 2017-04-18 |