JF

John K. Frediani

AD Advantest: 4 patents #256 of 1,193Top 25%
Pitney Bowes: 4 patents #333 of 1,308Top 30%
VP Verigy (Singapore) Pte.: 3 patents #16 of 115Top 15%
Overall (All Time): #453,596 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11041907 Method and system for acquisition of test data Ben Rogel-Favila, Mei-Mei Su, Shunji Tachibana 2021-06-22
10634723 Method and system for acquisition of test data Ben Rogel-Favila, Mei-Mei Su, Shunji Tachibana 2020-04-28
10161993 Tester with acceleration on memory and acceleration for automatic pattern generation within a FPGA block Andrew Niemic 2018-12-25
9810729 Tester with acceleration for packet building within a FPGA block 2017-11-07
8127186 Methods and apparatus for estimating a position of a stuck-at defect in a scan chain of a device under test Phillip D. Burlison 2012-02-28
7865788 Dynamic mask memory for serial scan testing Phillip D. Burlison, Mei-Mei Su 2011-01-04
7650547 Apparatus for locating a defect in a scan chain while testing digital logic Phillip D. Burlison 2010-01-19
4422070 Circuit for controlling character attributes in a word processing system having a display Robert A. Couper, Terrance L. Lillie 1983-12-20
4398246 Word processing system employing a plurality of general purpose processor circuits Richard E. Johnson, Terrance L. Lillie 1983-08-09
4393377 Circuit for controlling information on a display Robert A. Couper, Terrance L. Lillie 1983-07-12
4387424 Communications systems for a word processing system employing distributed processing circuitry Terrance L. Lillie 1983-06-07