JE

Jose J. Estabil

TA Tau-Metrix: 10 patents #4 of 7Top 60%
📍 Weston, CT: #28 of 210 inventorsTop 15%
🗺 Connecticut: #4,552 of 34,797 inventorsTop 15%
Overall (All Time): #513,955 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
8990759 Contactless technique for evaluating a fabrication of a wafer Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck 2015-03-24
8344745 Test structures for evaluating a fabrication of a die or a wafer Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2013-01-01
7736916 System and apparatus for using test structures inside of a chip during the fabrication of the chip Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2010-06-15
7730434 Contactless technique for evaluating a fabrication of a wafer Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck 2010-06-01
7723724 System for using test structures to evaluate a fabrication of a wafer Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2010-05-25
7605597 Intra-chip power and test signal generation for use with test structures on wafers Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2009-10-20
7423288 Technique for evaluating a fabrication of a die and wafer Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2008-09-09
7339388 Intra-clip power and test signal generation for use with test structures on wafers Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2008-03-04
7256055 System and apparatus for using test structures inside of a chip during the fabrication of the chip Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2007-08-14
7220990 Technique for evaluating a fabrication of a die and wafer Majid Aghababazadeh, Nader Pakdaman, Gary Steinbrueck, James S. Vickers 2007-05-22