Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5053353 | Fabricating dielectric isolation of SOI island side wall for reducing leakage current | — | 1991-10-01 |
| 5034789 | Dielectric isolation for SOI island side wall for reducing leakage current | — | 1991-07-23 |
| 4970573 | Self-planarized gold interconnect layer | Bruce Edmunds Roberts, George E. Mraz | 1990-11-13 |
| 4753851 | Multiple layer, tungsten/titanium/titanium nitride adhesion/diffusion barrier layer structure for gold-base microcircuit interconnection | Bruce Edmunds Roberts, Charles M. Dalton | 1988-06-28 |
| 4716071 | Method of ensuring adhesion of chemically vapor deposited oxide to gold integrated circuit interconnect lines | Bruce Edmunds Roberts, Dyer A. Matlock | 1987-12-29 |
| 4713260 | Method of ensuring adhesion of chemically vapor deposited oxide to gold integrated circuit interconnect lines | Bruce Edmunds Roberts, Dyer A. Matlock | 1987-12-15 |
| 4702967 | Multiple-layer, multiple-phase titanium/nitrogen adhesion/diffusion barrier layer structure for gold-base microcircuit interconnection | Bruce Edmunds Roberts | 1987-10-27 |
| 4624749 | Electrodeposition of submicrometer metallic interconnect for integrated circuits | Bruce Edmunds Roberts, Dyer A. Matlock | 1986-11-25 |