DM

Dyer A. Matlock

Harris: 11 patents #104 of 2,288Top 5%
Overall (All Time): #474,285 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
5429958 Process for forming twin well CMOS integrated circuits 1995-07-04
5247199 Process for forming twin well CMOS integrated circuits 1993-09-21
5185292 Process for forming extremely thin edge-connectable integrated circuit structure Nicolaas W. VanVonno 1993-02-09
5071792 Process for forming extremely thin integrated circuit dice Nicolaas W. VanVonno 1991-12-10
4908683 Technique for elimination of polysilicon stringers in direct moat field oxide structure Richard L. Lichtel, Jr., Lawrence G. Pearce 1990-03-13
4829359 CMOS device having reduced spacing between N and P channel Kenneth K. O, Lawrence G. Pearce 1989-05-09
4814285 Method for forming planarized interconnect level using selective deposition and ion implantation Richard L. Lichtel, Jr. 1989-03-21
4716071 Method of ensuring adhesion of chemically vapor deposited oxide to gold integrated circuit interconnect lines Bruce Edmunds Roberts, Jimmy C. Black 1987-12-29
4713260 Method of ensuring adhesion of chemically vapor deposited oxide to gold integrated circuit interconnect lines Bruce Edmunds Roberts, Jimmy C. Black 1987-12-15
4702000 Technique for elimination of polysilicon stringers in direct moat field oxide structure Richard L. Lichtel, Jr., Lawrence G. Pearce 1987-10-27
4624749 Electrodeposition of submicrometer metallic interconnect for integrated circuits Jimmy C. Black, Bruce Edmunds Roberts 1986-11-25