Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10147801 | Transistor with buried P+ and source contact | Marco A. Zuniga, Yang Lu, Badredin Fatemizadeh, Amit Paul, Jun Ruan | 2018-12-04 |
| 9780204 | DMOS transistor with trench schottky diode | Paul M. Moore, David Raymond Zinn | 2017-10-03 |
| 9530880 | DMOS transistor with trench schottky diode | Paul M. Moore, David Raymond Zinn | 2016-12-27 |
| 9159804 | Vertical gate LDMOS device | Marco A. Zuniga, Yang Lu, Badredin Fatemizadeh, Amit Paul, Jun Ruan | 2015-10-13 |
| 8969158 | Vertical gate LDMOS device | Marco A. Zuniga, Yang Lu, Badredin Fatemizadeh, Amit Paul, Jun Ruan | 2015-03-03 |
| 8866217 | Vertical gate LDMOS device | Marco A. Zuniga, Yang Lu, Badredin Fatemizadeh, Amit Paul, Jun Ruan | 2014-10-21 |
| 8709899 | Vertical gate LDMOS device | Marco A. Zuniga, Yang Lu, Badredin Fatemizadeh, Amit Paul, Jun Ruan +1 more | 2014-04-29 |
| 8647950 | Vertical gate LDMOS device | Marco A. Zuniga, Yang Lu, Badredin Fatemizadeh, Amit Paul, Jun Ruan | 2014-02-11 |
| 6913981 | Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer | Jay A. Shideler, Ronald L. Schlupp, Robert W. Bechdolt | 2005-07-05 |
| 6699765 | Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer | Jay A. Shideler, Ronald L. Schlupp, Robert W. Bechdolt | 2004-03-02 |
| 6329698 | Forming a self-aligned epitaxial base bipolar transistor | Waclaw C. Koscielniak, Kulwant S. Egan | 2001-12-11 |
| 6020246 | Forming a self-aligned epitaxial base bipolar transistor | Waclaw C. Koscielniak, Kulwant S. Egan | 2000-02-01 |
| 5268315 | Implant-free heterojunction bioplar transistor integrated circuit process | Song-wook PARK, William A. Vetanen, Irene G. Beers, Curtis M. Haynes | 1993-12-07 |
| 4477825 | Electrically programmable and erasable memory cell | Giora Yaron, Ying K. Shum, Ury Priel, Mark S. Ebel | 1984-10-16 |