Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7098113 | Method and system for providing a power lateral PNP transistor using a buried power buss | John Durbin Husher | 2006-08-29 |
| 6913981 | Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer | Jay A. Shideler, Jayasimha Prasad, Robert W. Bechdolt | 2005-07-05 |
| 6815353 | Multi-layer film stack polish stop | Linda Koyama | 2004-11-09 |
| 6699765 | Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer | Jay A. Shideler, Jayasimha Prasad, Robert W. Bechdolt | 2004-03-02 |
| 6566733 | Method and system for providing a power lateral PNP transistor using a buried power buss | John Durbin Husher | 2003-05-20 |
| 4639288 | Process for formation of trench in integrated circuit structure using isotropic and anisotropic etching | William L. Price, Mammen Thomas | 1987-01-27 |
| 4518981 | Merged platinum silicide fuse and Schottky diode and method of manufacture thereof | — | 1985-05-21 |