| 7397288 |
Fan out buffer and method therefor |
— |
2008-07-08 |
| 7218174 |
Delay circuit and method therefor |
— |
2007-05-15 |
| 7196549 |
Interface system and method therefor |
— |
2007-03-27 |
| 7135924 |
Cross-talk reduction circuit and method therefor |
— |
2006-11-14 |
| 7129781 |
High slew ECL device and method therefor |
— |
2006-10-31 |
| 7119618 |
Method of forming a wide bandwidth differential amplifier and structure therefor |
— |
2006-10-10 |
| 6906580 |
Method of forming a reference voltage generator and structure therefor |
— |
2005-06-14 |
| 6333672 |
Differential logic circuit and method of use |
— |
2001-12-25 |
| 6308577 |
Circuit and method of compensating for membrane stress in a sensor |
Andrew C. McNeil |
2001-10-30 |
| 6150917 |
Piezoresistive sensor bridge having overlapping diffused regions to accommodate mask misalignment and method |
Brian D. Meyer |
2000-11-21 |
| 5770965 |
Circuit and method of compensating for non-linearities in a sensor signal |
George B. Gritt, Jr. |
1998-06-23 |
| 5589703 |
Edge die bond semiconductor package |
— |
1996-12-31 |
| 5551304 |
Method for setting sensing polarity of a sensor device |
— |
1996-09-03 |
| 5387316 |
Wafer etch protection method |
Ronald C. Pennell, Lynn William Ford |
1995-02-07 |
| 5250847 |
Stress isolating signal path for integrated circuits |
— |
1993-10-05 |
| 5132559 |
Circuit for trimming input offset voltage utilizing variable resistors |
— |
1992-07-21 |
| 5110758 |
Method of heat augmented resistor trimming |
— |
1992-05-05 |
| 5031461 |
Matched pair of sensor and amplifier circuits |
— |
1991-07-16 |
| 4760249 |
Logic array having multiple optical logic inputs |
— |
1988-07-26 |
| 4730130 |
Writable array logic |
— |
1988-03-08 |
| 4730275 |
Circuit for reducing the row select voltage swing in a memory array |
— |
1988-03-08 |
| 4716547 |
Current switch for programming vertical fuses of a read only memory |
Gene Sluss |
1987-12-29 |
| 4712193 |
Current steering differential write circuit for memory cells |
— |
1987-12-08 |
| 4585959 |
Tri-state logic gate having reduced Miller capacitance |
Cleon Petty |
1986-04-29 |
