Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10180455 | Burn-in testing of circuits | Rex Kho, Markus Schuemmer | 2019-01-15 |
| 7000163 | Optimized buffering for JTAG boundary scan nets | Juergen Dirks, Juergen Lahner, Ludger F. Johanterwage, Benjamin Mbouombouo, Weidan Li | 2006-02-14 |
| 6898770 | Split and merge design flow concept for fast turnaround time of circuit layout design | Benjamin Mbouombouo, Johann Leyrer | 2005-05-24 |
| 6788098 | Test structures for simultaneous switching output (SSO) analysis | Alaa A. Alani, Johann Leyrer | 2004-09-07 |
| 6532577 | Timing driven interconnect analysis | Benjamin Mbouombouo, Johann Leyrer | 2003-03-11 |