Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9378968 | Method for planarizing semiconductor device | Yi-Ching Wu, Yung-Chieh Kuo | 2016-06-28 |
| 6657283 | Reducing relative stress between HDP layer and passivation layer | Ellis Lee, Ing-Tang Chen | 2003-12-02 |
| 6426546 | Reducing relative stress between HDP layer and passivation layer | Ing-Tang Chen | 2002-07-30 |
| 6365062 | Treatment on silicon oxynitride | I. T. Chen | 2002-04-02 |
| 6333261 | Method for preventing aluminum intrusions | Chi-Jung Lin, Jyh-J Huang, Kun-Lin Wu | 2001-12-25 |
| 6235647 | Deposition process for forming void-free dielectric layer | I. T. Chen | 2001-05-22 |
| 6225204 | Method for preventing poisoned vias and trenches | Kun-Lin Wu | 2001-05-01 |
| 6180467 | Method of fabricating shallow trench isolation | Kun-Lin Wu | 2001-01-30 |
| 6150259 | Method for forming a metal plug | Kun-Lin Wu | 2000-11-21 |
| 6146742 | Barrier/glue layer on polysilicon layer | Wen-Yi Hsieh, Chi-Rong Lin, Jenn-Tarng Lin | 2000-11-14 |
| 6136164 | Apparatus for detecting position of collimator in sputtering processing chamber | Ing-Tang Chen | 2000-10-24 |
| 6123776 | Gas delivering apparatus for chemical vapor deposition | Kuen-Jian Chen | 2000-09-26 |
| 6121132 | Method for reducing stress on collimator titanium nitride layer | Chi-Rong Lin | 2000-09-19 |
| 6093634 | Method of forming a dielectric layer on a semiconductor wafer | Ing-Tang Chen | 2000-07-25 |
| 6093639 | Process for making contact plug | Clint Wu, Jenn-Tarng Lin | 2000-07-25 |
| 6071806 | Method for preventing poisoned vias and trenches | Kun-Lin Wu | 2000-06-06 |
| 6060405 | Method of deposition on wafer | Ru Chang | 2000-05-09 |
| 6057248 | Method of removing residual contaminants in an alignment mark after a CMP process | Kun-Lin Wu | 2000-05-02 |
| 6030892 | Method of preventing overpolishing in a chemical-mechanical polishing operation | Kun-Lin Wu, Hao-Kuang Chiu, Jenn-Tarng Lin | 2000-02-29 |
| 6013581 | Method for preventing poisoned vias and trenches | Kun-Lin Wu | 2000-01-11 |
| 6013559 | Method of forming trench isolation | Kun-Lin Wu | 2000-01-11 |
| 6008108 | Method of fabricating a shallow-trench isolation structure in an integrated circuit | Chen Huang | 1999-12-28 |
| 5990004 | Method for forming a tungsten plug and a barrier layer in a contact of high aspect ratio | Yu-Ru Yang, Jenn-Tarng Lin | 1999-11-23 |
| 5950108 | Method of fabricating a conductive plug | Clint Wu, Jenn-Tarng Lin | 1999-09-07 |
| 5883004 | Method of planarization using interlayer dielectric | Hao SHIU, Kun-Lin Wu, Jenn-Tarng Lin | 1999-03-16 |