Issued Patents All Time
Showing 25 most recent of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9537398 | Voltage generating circuit and regulator circuit for precisely control predetermined high voltage | Tomofumi Kitani | 2017-01-03 |
| 9502969 | Negative reference voltage generating circuit | Tomofumi Kitani | 2016-11-22 |
| 9397562 | Negative reference voltage generating circuit and system thereof | Nobuhiko Ito, Teruaki Maeda | 2016-07-19 |
| 9299578 | Transistor formation method using sidewall masks | Takuo Ito | 2016-03-29 |
| 9214242 | Programming method for NAND flash memory device to reduce electrons in channels | Takashi Miida, Riichiro Shirota, Ching-Sung Yang, Tzung Ling Lin | 2015-12-15 |
| 9076546 | Nonvolatile semiconductor storage device and control method thereof | Akitomo Nakayama | 2015-07-07 |
| 9064580 | Nonvolatile semiconductor memory device and write-in method thereof | Makoto Senoo, Riichiro Shirota | 2015-06-23 |
| 8599614 | Programming method for NAND flash memory device to reduce electrons in channels | Takashi Miida, Riichiro Shirota, Ching-Sung Yang, Tzung Ling Lin | 2013-12-03 |
| 8131954 | Memory device and data reading method | Chun-Yi Tu, Te-Chang Tseng, Takeshi Nakayama | 2012-03-06 |
| 7903470 | Integrated circuits and discharge circuits | Te-Chang Tseng, Chun-Yi Tu, Yamasaki Kyoji | 2011-03-08 |
| 7881142 | Storage device and control method thereof | Satoru Kawamoto | 2011-02-01 |
| 7778087 | Memory programming method and data access method | Chun-Yi Tu, Te-Chang Tseng, Takeshi Nakayama | 2010-08-17 |
| 7501677 | SONOS memory with inversion bit-lines | Hidehiko Shiraiwa, Jaeyong Park, Satoshi Torii, Masaru Yano | 2009-03-10 |
| 7385844 | Semiconductor device and method of controlling the same | Masaru Yano, Mototada Sakashita | 2008-06-10 |
| 7372743 | Controlling a nonvolatile storage device | Masaru Yano, Mototada Sakashita, Akira Ogawa, Yoshiaki Shinmura, Hajime Aoki | 2008-05-13 |
| 7362620 | Semiconductor device and method of controlling the same | Masaru Yano, Mototada Sakashita | 2008-04-22 |
| 7321511 | Semiconductor device and method for controlling operation thereof | Masaru Yano, Hidehiko Shiraiwa | 2008-01-22 |
| 7274602 | Storage device and control method therefor | — | 2007-09-25 |
| 7151293 | SONOS memory with inversion bit-lines | Hidehiko Shiraiwa, Jaeyong Park, Satoshi Torii, Masaru Yano | 2006-12-19 |
| 7096406 | Memory controller for multilevel cell memory | Keisuke Kanazawa, Hiroaki Watanabe, Yoshinobu Higuchi, Yoshiki Okumura, Yutaka Sekino | 2006-08-22 |
| 6385088 | Non-volatile memory device | Akira Tanaka, Kenshiro Arase, Masaru Miyashita | 2002-05-07 |
| 6208200 | Level shift circuit with low voltage operation | — | 2001-03-27 |
| 5883501 | Power supply circuit | — | 1999-03-16 |
| 5590073 | Random access memory having flash memory | Takashi Narikiyo | 1996-12-31 |
| 5489870 | Voltage booster circuit | — | 1996-02-06 |