Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11276442 | Apparatuses and methods for clock leveling in semiconductor memories | Koji Ito, Keisuke Tada | 2022-03-15 |
| 10839876 | Apparatuses and methods for clock leveling in semiconductor memories | Koji Ito, Keisuke Tada | 2020-11-17 |
| 9030245 | Semiconductor device that can adjust propagation time of internal clock signal | Satoshi Morishita, Yoshinori Matsui, Yasushi Matsubara | 2015-05-12 |
| 8787089 | Semiconductor device and method of controlling the same | Masaru Yano, Kazuhide Kurosaki | 2014-07-22 |
| 8325523 | Semiconductor device and method of controlling the same | Masaru Yano, Kazuhide Kurosaki | 2012-12-04 |
| 8018767 | Semiconductor device and method of controlling the same | Masaru Yano, Kazuhide Kurosaki | 2011-09-13 |
| 7468909 | Semiconductor device and method of controlling the same | Masaru Yano, Kazuhide Kurosaki | 2008-12-23 |
| 7450419 | Semiconductor device and control method therefor | Masaru Yano, Akira Ogawa, Tsutomu Nakai | 2008-11-11 |
| 7385844 | Semiconductor device and method of controlling the same | Masaru Yano, Hideki Arakawa | 2008-06-10 |
| 7372743 | Controlling a nonvolatile storage device | Masaru Yano, Hideki Arakawa, Akira Ogawa, Yoshiaki Shinmura, Hajime Aoki | 2008-05-13 |
| 7362620 | Semiconductor device and method of controlling the same | Masaru Yano, Hideki Arakawa | 2008-04-22 |
| 6768682 | Nonvolatile semiconductor memory and method for controlling programming voltage of nonvolatile semiconductor memory | Masaru Yano | 2004-07-27 |