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Cache control circuitry and methods |
Luca NASSI, Rémi Marius Teyssier, Cedric Denis Robert Airaud, Albin Pierrick Tonnerre, Christophe Laurent Carbonne +1 more |
2021-09-28 |
| 11036511 |
Processing of a temporary-register-using instruction including determining whether to process a register move micro-operation for transferring data from a first register file to a second register file based on whether a temporary variable is still available in the second register file |
Xiaoyang Shen, Damien Robin Martin, Cedric Denis Robert Airaud, Luca NASSI |
2021-06-15 |
| 10977044 |
Executing branch instructions following a speculation barrier instruction |
Rémi Marius Teyssier, Luca NASSI, Albin Pierrick Tonnerre |
2021-04-13 |
| 10915327 |
Apparatus and method of dispatching instructions for execution clusters based on dependencies |
Luca NASSI, Rémi Marius Teyssier, Damian Maiorano |
2021-02-09 |
| 10635445 |
Handling modifications to permitted program counter ranges in a data processing apparatus |
Rémi Marius Teyssier, Albin Pierrick Tonnerre, Cedric Denis Robert Airaud, Luca NASSI, Guillaume Bolbenes +2 more |
2020-04-28 |