Issued Patents All Time
Showing 1–25 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431884 | Data communication link with capacitor-based pumped output | Ka Yiu Li, Elad Alon | 2025-09-30 |
| 12095470 | Measurement and control of clock signal phases | Paul Everhardt, Wade Berglund, Matthew Craig Spencer, Peter Hermansen, Michael Scott +1 more | 2024-09-17 |
| 11955978 | Circuit for a voltage comparator | Elad Alon | 2024-04-09 |
| 10992449 | Encoding and striping technique for DC balancing in single-ended signaling | Loren Blair Reiss, Fred Staples Stivers | 2021-04-27 |
| 10498345 | Multiple injection lock ring-based phase interpolator | Sambarta Rakshit | 2019-12-03 |
| 10389368 | Dual path phase-locked loop circuit | Fuyue Wang, Ling Chen, Thomas Evan Wilson, Jianyun Zhang | 2019-08-20 |
| 10345845 | Fast settling bias circuit | Ling Chen, Fuyue Wang, Thomas Evan Wilson, Jianyun Zhang | 2019-07-09 |
| 10225115 | Low-frequency periodic signal detector | Mathieu Gagnon, Santiago Luis Bortman, Guillaume Fortin, Julien Faucher | 2019-03-05 |
| 10193555 | Methods and devices for a memory interface receiver | Thomas Evan Wilson | 2019-01-29 |
| 10161974 | Frequency to current circuit | Ling Chen, Fuyue Wang, Thomas Evan Wilson, Jianyun Zhang | 2018-12-25 |
| 9589627 | Methods and devices for a DDR memory driver using a voltage translation capacitor | Thomas Evan Wilson | 2017-03-07 |
| 9490795 | System and method for selectively coupled parasitic compensation for input referred voltage offset in electronic circuit | Ali Ulas Ilhan | 2016-11-08 |
| 9450511 | Differential signal detector and full wave rectifier circuit thereof with common mode signal rejection | Santiago Luis Bortman | 2016-09-20 |
| 9405314 | System and method for synchronously adjusted delay and distortion mitigated recovery of signals | Thomas Evan Wilson | 2016-08-02 |
| 9356767 | Hybrid analog/digital clock recovery system | Ali Ulas Ilhan | 2016-05-31 |
| 9285778 | Time to digital converter with successive approximation architecture | William P. Evans, Anthony Caviglia | 2016-03-15 |
| 9148130 | System and method for boosting a selective portion of a drive signal for chip-to-chip transmission | Ali Ulas Ilhan | 2015-09-29 |
| 9071193 | System and method for augmenting frequency tuning resolution in L-C oscillation circuit | Anthony Caviglia, Hugh Miller Thompson | 2015-06-30 |
| 8737490 | Analog-to-digital converter based decision feedback equalization | Thomas Evan Wilson | 2014-05-27 |
| 8737491 | Analog-to-digital converter based decision feedback equalization | Thomas Evan Wilson | 2014-05-27 |
| 8710929 | System and method for combined I/Q generation and selective phase interpolation | Chris Moscone, Rajagopal Vijayaraghavan, Benjamin Heilmann | 2014-04-29 |
| 8502586 | Methods of clock signal generation with selected phase delay | Thomas Evan Wilson | 2013-08-06 |
| 8384453 | Frequency adjustment in a control system | Anthony Caviglia | 2013-02-26 |
| 8063686 | Phase interpolator circuit with two phase capacitor charging | Thomas Evan Wilson | 2011-11-22 |
| 8036300 | Dual loop clock recovery circuit | William P. Evans | 2011-10-11 |