Issued Patents All Time
Showing 126–150 of 180 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5778418 | Mass computer storage system having both solid state and rotating disk types of memory | Daniel L. Auclair | 1998-07-07 |
| 5756385 | Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers | Jack Yuan, Henry Chien, Gheorghe Samachisa | 1998-05-26 |
| 5747359 | Method of patterning polysilicon layers on substrate | Jack Yuan, Henry Chien, Gheorghe Samachisa | 1998-05-05 |
| 5719808 | Flash EEPROM system | Robert Norman, Sanjay Mehrotra | 1998-02-17 |
| 5712819 | Flash EEPROM system with storage of sector characteristic information within the sector | — | 1998-01-27 |
| 5671229 | Flash eeprom system with defect handling | Robert Norman, Sanjay Mehrotra | 1997-09-23 |
| 5663901 | Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems | Robert F. Wallace, Robert Norman | 1997-09-02 |
| 5654217 | Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers | Jack Yuan, Henry Chien, Gheorghe Samachisa | 1997-08-05 |
| 5642312 | Flash EEPROM system cell array with more than two storage states per memory cell | — | 1997-06-24 |
| 5602987 | Flash EEprom system | Robert Norman, Sanjay Mehrotra | 1997-02-11 |
| 5583812 | Flash EEPROM system cell array with more than two storage states per memory cell | — | 1996-12-10 |
| 5568439 | Flash EEPROM system which maintains individual memory block cycle counts | — | 1996-10-22 |
| 5554553 | Highly compact EPROM and flash EEPROM devices | — | 1996-09-10 |
| 5544118 | Flash EEPROM system cell array with defect management including an error correction scheme | — | 1996-08-06 |
| 5534456 | Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with sidewall spacers | Jack Yuan, Henry Chien, Gheorghe Samachisa | 1996-07-09 |
| 5535328 | Non-volatile memory system card with flash erasable sectors of EEprom cells including a mechanism for substituting defective cells | Robert Norman, Sanjay Mehrotra | 1996-07-09 |
| 5512505 | Method of making dense vertical programmable read only memory cell structure | Jack Yuan, Gheorghe Samachisa, Daniel C. Guterman | 1996-04-30 |
| 5504760 | Mixed data encoding EEPROM system | Daniel C. Guterman, Sanjay Mehrotra, Stephen J. Gross, Robert Norman | 1996-04-02 |
| 5434825 | Flash EEPROM system cell array with more than two storage states per memory cell | — | 1995-07-18 |
| 5418752 | Flash EEPROM system with erase sector select | Robert Norman, Sanjay Mehrotra | 1995-05-23 |
| 5396468 | Streamlined write operation for EEPROM system | Daniel C. Guterman, Sanjay Mehrotra, Stephen J. Gross, John S. Mangan | 1995-03-07 |
| 5380672 | Dense vertical programmable read only memory cell structures and processes for making them | Jack Yuan, Gheorghe Samachisa, Daniel C. Guterman | 1995-01-10 |
| 5369615 | Method for optimum erasing of EEPROM | Daniel C. Guterman, Sanjay Mehrotra, Stephen J. Gross | 1994-11-29 |
| 5343063 | Dense vertical programmable read only memory cell structure and processes for making them | Jack Yuan, Gheorghe Samachisa, Daniel C. Guterman | 1994-08-30 |
| 5327375 | DRAM cell utilizing novel capacitor | — | 1994-07-05 |