Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11904164 | Nanosecond pulsed electric field system | Kenneth R. Krieg, Gregory P. Schaadt | 2024-02-20 |
| 11766563 | Nanosecond pulsed power sources having multi-core transformers | Gregory P. Schaadt, Kenneth R. Krieg | 2023-09-26 |
| 11452870 | Nanosecond pulsed power sources having multi-core transformers | Gregory P. Schaadt, Kenneth R. Krieg | 2022-09-27 |
| 10389224 | Power converter system and method of operating thereof | — | 2019-08-20 |
| 10067519 | On-chip regulator with variable load compensation | Brian S. Leibowitz, Michael D. Bucher, Lei Luo, Amir Amirkhany, Huy M. Nguyen +2 more | 2018-09-04 |
| 9684321 | On-chip regulator with variable load compensation | Brian S. Leibowitz, Michael D. Bucher, Lei Luo, Amir Amirkhany, Huy M. Nguyen +2 more | 2017-06-20 |
| 9484891 | Multi-modal communication interface | Amir Amirkhany | 2016-11-01 |
| 9046909 | On-chip regulator with variable load compensation | Brian S. Leibowitz, Michael D. Bucher, Lei Luo, Amir Amirkhany, Huy M. Nguyen +2 more | 2015-06-02 |
| 8531206 | High resolution output driver | Amir Amirkhany, Kambiz Kaviani, Wayne D. Dettloff, Kun-Yung Chang | 2013-09-10 |
| 8487650 | Methods and circuits for calibrating multi-modal termination schemes | Hajee Mohammed Shuaeb Fazeel, Amir Amirkhany, Gundlapalli Shanmukha Srinivas | 2013-07-16 |
| 7464282 | Apparatus and method for producing dummy data and output clock generator using same | Shahram Abdollahi-Alibeik | 2008-12-09 |
| 7089439 | Architecture and method for output clock generation on a high speed memory device | Shahram Abdollahi-Alibeik | 2006-08-08 |
| 6977980 | Timing synchronization methods and systems for transmit parallel interfaces | Kun-Yung Chang | 2005-12-20 |
| 6975260 | Geometric D/A converter for a delay-locked loop | Shahram Abdollahi-Alibeik | 2005-12-13 |
| 6947349 | Apparatus and method for producing an output clock pulse and output clock generator using same | Shahram Abdollahi-Alibeik | 2005-09-20 |
| 6891774 | Delay line and output clock generator using same | Shahram Abdollahi-Alibeik | 2005-05-10 |
| 6819278 | Geometric D/A converter for a delay-locked loop | Shahram Abdollahi-Alibeik | 2004-11-16 |
| 6734815 | Geometric D/A converter for a delay-locked loop | Shahram Abdollahi-Alibeik | 2004-05-11 |
| 6369626 | Low pass filter for a delay locked loop circuit | Kevin S. Donnelly, Andy Peng-Pui Chan, Thomas H. Lee, Wayne S. Richardson, Jared L. Zerbe +2 more | 2002-04-09 |