Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7053663 | Dynamic gate with conditional keeper for soft error rate reduction | Peter Hazucha, Ram Krishnamurthy, Tanay Karnik | 2006-05-30 |
| 7002389 | Fast static receiver with input transition dependent inversion threshold | Ram Krishnamurthy | 2006-02-21 |
| 6919737 | Voltage-level converter | Ram Krishnamurthy | 2005-07-19 |
| 6847569 | Differential current sense amplifier | Manoj Sinha, Ram Krishnamurthy | 2005-01-25 |
| 6838910 | Fast dual-rail dynamic logic style | Per Larsson-Edefors, Ram Krishnamurthy, Krishnamurthy Soumyanath | 2005-01-04 |
| 6791364 | Conditional burn-in keeper for dynamic circuits | Ram Krishnamurthy | 2004-09-14 |
| 6751141 | Differential charge transfer sense amplifier | Manoj Sinha, Ram Krishnamurthy | 2004-06-15 |
| 6717441 | Flash [II]-Domino: a fast dual-rail dynamic logic style | Per Larsson-Edefors, Ram Krishnamurthy, Krishnamurthy Soumyanath | 2004-04-06 |
| 6707708 | Static random access memory with symmetric leakage-compensated bit line | Dinesh Somasekhar, Steven Hsu, Ram Krishnamurthy, Vivek K. De | 2004-03-16 |
| 6690205 | Enhanced domino circuit | — | 2004-02-10 |
| 6633190 | Multi-phase clock generation and synchronization | Daniel Eckerbert, Ram Krishnamurthy | 2003-10-14 |
| 6617890 | Measuring power supply stability | Tsung-Hao Chen, Peter Hazucha, Tanay Karnik, Chung-Ping Chen | 2003-09-09 |
| 6614680 | Current leakage reduction for loaded bit-lines in on-chip memory structures | Ram Krishnamurthy, Siva G. Narendra | 2003-09-02 |
| 6590801 | Current leakage reduction for loaded bit-lines in on-chip memory structures | Ram Krishnamurthy, Siva G. Narendra | 2003-07-08 |
| 6559492 | On-die switching power converter with stepped switch drivers and method | Peter Hazucha | 2003-05-06 |
| 6549040 | Leakage-tolerant keeper with dual output generation capability for deep sub-micron wide domino gates | Krishnamurthy Soumyanath, Ram Krishnamurthy | 2003-04-15 |
| 6519178 | Current leakage reduction for loaded bit-lines in on-chip memory structures | Ram Krishnamurthy, Siva G. Narendra | 2003-02-11 |
| 6510077 | Current leakage reduction for loaded bit-lines in on-chip memory structures | Ram Krishnamurthy, Siva G. Narendra | 2003-01-21 |
| 6498514 | Domino circuit | — | 2002-12-24 |
| 6493254 | Current leakage reduction for loaded bit-lines in on-chip memory structures | Ram Krishnamurthy, Siva G. Narendra | 2002-12-10 |
| 6388940 | Leakage-tolerant circuit and method for large register files | Ganesh Balamurugan, Krishnamurthy Soumyanath | 2002-05-14 |
| 6353342 | Integrated circuit bus architecture including a full-swing, clocked, common-gate receiver for fast on-chip signal transmission | Soumyanath Krishnamurthy, Ram Krishnamurthy | 2002-03-05 |
| 6351150 | Low switching activity dynamic driver for high performance interconnects | Ram Krishnamurthy, Mark A. Anders | 2002-02-26 |
| 6137319 | Reference-free single ended clocked sense amplifier circuit | Ram Krishnamurthy, Reed D. Spotten | 2000-10-24 |