AT

Archana Tankasala

IN Intel: 2 patents #13,213 of 30,777Top 45%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #1,687,621 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12211563 Dynamic gate steps for last-level programming to improve write performance Sagar Upadhyay, Aliasgar S. Madraswala, Shantanu R. Rajwade 2025-01-28
12189955 Skip program verify for dynamic start voltage sampling Sagar Upadhyay, Shantanu R. Rajwade, Aliasgar S. Madraswala 2025-01-07