Issued Patents All Time
Showing 76–100 of 241 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5946264 | Method and structure for enhancing the access time of integrated circuit memory devices | — | 1999-08-31 |
| 5939914 | Synchronous test mode initialization | — | 1999-08-17 |
| 5905683 | Method and structure for recovering smaller density memories from larger density memories | — | 1999-05-18 |
| 5898235 | Integrated circuit with power dissipation control | — | 1999-04-27 |
| 5896336 | Device and method for driving a conductive path with a signal | — | 1999-04-20 |
| 5896040 | Configurable probe pads to facilitate parallel testing of integrated circuit devices | Michael Brannigan, Mark A. Lysinger | 1999-04-20 |
| 5896039 | Configurable probe pads to facilitate parallel testing of integrated circuit devices | Michael Brannigan, Mark A. Lysinger | 1999-04-20 |
| 5883838 | Device and method for driving a conductive path with a signal | — | 1999-03-16 |
| 5883008 | Integrated circuit die suitable for wafer-level testing and method for forming the same | — | 1999-03-16 |
| 5864696 | Circuit and method for setting the time duration of a write to a memory cell | — | 1999-01-26 |
| 5861660 | Integrated-circuit die suitable for wafer-level testing and method for forming the same | — | 1999-01-19 |
| 5848018 | Memory-row selector having a test function | — | 1998-12-08 |
| 5845059 | Data-input device for generating test signals on bit and bit-complement lines | — | 1998-12-01 |
| 5841789 | Apparatus for testing signal timing and programming delay | — | 1998-11-24 |
| 5841709 | Memory having and method for testing redundant memory cells | — | 1998-11-24 |
| 5835427 | Stress test mode | — | 1998-11-10 |
| 5831457 | Input buffer circuit immune to common mode power supply fluctuations | — | 1998-11-03 |
| 5828622 | Clocked sense amplifier with wordline tracking | — | 1998-10-27 |
| 5825691 | Circuit and method for terminating a write to a memory cell | — | 1998-10-20 |
| 5808947 | Integrated circuit that supports and method for wafer-level testing | — | 1998-09-15 |
| 5808960 | Circuit and method for tracking the start of a write to a memory cell | — | 1998-09-15 |
| 5805611 | Method and apparatus for testing high-frequency integrated circuits using a lower-frequency tester | — | 1998-09-08 |
| 5801563 | Output driver circuitry having a single slew rate resistor | — | 1998-09-01 |
| 5802004 | Clocked sense amplifier with wordline tracking | — | 1998-09-01 |
| 5798980 | Pipelined chip enable control circuitry and methodology | — | 1998-08-25 |