Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5860096 | Multi-level instruction cache for a computer | Stephen R. Undy, Patrick Knebel | 1999-01-12 |
| 5426771 | System and method for performing high-sped cache memory writes | Thomas A. Asprey | 1995-06-20 |
| 5416918 | Low skew system for interfacing asics by routing internal clock off-chip to external delay element then feeding back to on-chip drivers | Robert J. Horning | 1995-05-16 |
| 5337415 | Predecoding instructions for supercalar dependency indicating simultaneous execution for increased operating frequency | Eric Delano, Mark A. Forsyth | 1994-08-09 |
| 5263173 | High speed clocked output driver for switching logic levels of an output pad at integer and integer and a half clock cycles | — | 1993-11-16 |