JC

Joseph A. Czagas

IA Intersil Americas: 7 patents #96 of 468Top 25%
Harris: 3 patents #528 of 2,288Top 25%
📍 Palm Bay, FL: #67 of 673 inventorsTop 10%
🗺 Florida: #5,384 of 67,251 inventorsTop 9%
Overall (All Time): #521,034 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
7605052 Method of forming an integrated circuit having a device wafer with a diffused doped backside layer Dustin A. Woodbury, James D. Beasom 2009-10-20
7285475 Integrated circuit having a device wafer with a diffused doped backside layer Dustin A. Woodbury, James D. Beasom 2007-10-23
7110933 Line modeling tool Rex Lowther, Gregg D. Croft, Yiqun Lin, Robert Lomenic, James P. Furino, Jr. 2006-09-19
6946364 Integrated circuit having a device wafer with a diffused doped backside layer Dustin A. Woodbury, James D. Beasom 2005-09-20
6867495 Integrated circuit having a device wafer with a diffused doped backside layer Dustin A. Woodbury, James D. Beasom 2005-03-15
6667523 Highly linear integrated resistive contact Dustin A. Woodbury 2003-12-23
6441447 Co-patterning thin-film resistors of different compositions with a conductive hard mask and method for same George Bajor, Leonel Ernesto Enriquez, Chris A. McCarty 2002-08-27
6403472 Method of forming resistive contacts on intergrated circuits with mobility spoiling ions including high resistive contacts and low resistivity silicide contacts Dustin A. Woodbury 2002-06-11
6362075 Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide Dustin A. Woodbury, James D. Beasom 2002-03-26
5976944 Integrated circuit with thin film resistors and a method for co-patterning thin film resistors with different compositions George Bajor, Leonel Ernesto Enriquez 1999-11-02