Howard G. Sachs — 19 Patents at Intergraph

Howard G. Sachs has been granted 19 US patents while listed as an inventor at Intergraph. The first was granted in 1989 and the most recent in June 2007. Howard G. Sachs ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Howard G. Sachs in Los Gatos, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7234123	Circuit group design methodologies	—	2007-06-19
7103736	System for repair of ROM programming errors or defects	—	2006-09-05
7058832	Idle power reduction for state machines	—	2006-06-06
7039791	Instruction cache association crossbar switch	Siamak Arya	2006-05-02	$10,488,000
6910199	Circuit group design methodologies	—	2005-06-21
6892293	VLIW processor and method therefor	Siamak Arya	2005-05-10	$3,859,000
6360313	Instruction cache associative crossbar switch	Siamak Arya	2002-03-19	$10,832,000
6282635	Method and apparatus for controlling an instruction pipeline in a data processing system	—	2001-08-28	$9,879,000
5996062	Method and apparatus for controlling an instruction pipeline in a data processing system	—	1999-11-30	$3,564,000
5794003	Instruction cache associative crossbar switch system	—	1998-08-11	$1,985,000
5560028	Software scheduled superscalar computer architecture	Siamak Arya	1996-09-24	$5,528,000
5502829	Apparatus for obtaining data from a translation memory based on carry signal from adder	—	1996-03-26	$8,261,000
5463750	Method and apparatus for translating virtual addresses in a data processing system having multiple instruction pipelines and separate TLB's	—	1995-10-31	$8,165,000
5255384	Memory address translation system having modifiable and non-modifiable translation mechanisms	James Y. Cho	1993-10-19	$4,802,000
5091846	Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency	James Y. Cho	1992-02-25	$10,751,000
4933835	Apparatus for maintaining consistency of a cache memory with a primary memory	James Y. Cho, Walter H. Hollingsworth	1990-06-12	$8,670,000
4899275	Cache-MMU system	James Y. Cho, Walter H. Hollingsworth	1990-02-06	$7,730,000
4884197	Method and apparatus for addressing a cache memory	James Y. Cho, Walter H. Hollingsworth	1989-11-28	$7,679,000
4860192	Quadword boundary cache system	James Y. Cho, Walter H. Hollingsworth	1989-08-22	$9,351,000

Howard G. Sachs — 19 Patents

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