Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4980019 | Etch-back process for failure analysis of integrated circuits | Valluri Rao | 1990-12-25 |
| 4961812 | Etch-back apparatus for integrated circuit failure analysis | Valluri Rao | 1990-10-09 |
| 4700454 | Process for forming MOS transistor with buried oxide regions for insulation | Chiu H. Ting, Byron B. Siu, J. C. Tzeng | 1987-10-20 |
| 4654958 | Process for forming isolated silicon regions and field-effect devices on a silicon substrate | Chiu H. Ting, Terence Tai-Li Hwa | 1987-04-07 |