Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10762877 | System, apparatus and method for reducing voltage swing on an interconnect | Anupama A. Thaploo, Jaydeep P. Kulkarni, Bhushan M. Borole, Abhishek R. Appu, Altug Koker +1 more | 2020-09-01 |
| 10761591 | Shutting down GPU components in response to unchanged scene detection | Prasoonkumar Surti, Nikos Kaburlasos, Bhushan M. Borole, Joydeep Ray, Elmoustapha Ould-Ahmed-Vall +3 more | 2020-09-01 |
| 10754809 | Reducing aging of register file keeper circuits | Anupama A. Thaploo, Bhushan M. Borole, Bee Ngo, Iqbal Rajwani, Altug Koker +2 more | 2020-08-25 |
| 10748238 | Frequent data value compression for graphics processing units | Saurabh Sharma, Abhishek Venkatesh, Travis T. Schluessler, Prasoonkumar Surti, Altug Koker +9 more | 2020-08-18 |
| 10691617 | Replacement policies for a hybrid hierarchical cache | Abhishek R. Appu, Joydeep Ray, James Valerio, Altug Koker, Prasoonkumar Surti +3 more | 2020-06-23 |
| 10587244 | Pulse triggered flip flop | Bhushan M. Borole, Anupama A. Thaploo, Altug Koker, Abhishek R. Appu, Kamal Sinha | 2020-03-10 |
| 10579121 | Processor power management | Altug Koker, Abhishek R. Appu, Kiran C. Veernapu, Joydeep Ray, Balaji Vembu +8 more | 2020-03-03 |
| 10580104 | Read/write modes for reducing power consumption in graphics processing units | Abhishek R. Appu, Kamal Sinha, Bhushan M. Borole, Altug Koker, Joydeep Ray | 2020-03-03 |
| 10521271 | Hybrid low power homogenous grapics processing units | Abhishek R. Appu, Altug Koker, Balaji Vembu, Joydeep Ray, Kamal Sinha +16 more | 2019-12-31 |
| 10444817 | System, apparatus and method for increasing performance in a processor during a voltage ramp | Altug Koker, Abhishek R. Appu, Bhushan M. Borole, Kamal Sinha, Joydeep Ray | 2019-10-15 |
| 10430147 | Collaborative multi-user virtual reality | Deepak S. Vembar, Atsuo Kuwahara, Chandrasekaran Sakthivel, Radhakrishnan Venkataraman, Brent Insko +18 more | 2019-10-01 |
| 10417734 | Compute optimization mechanism for deep neural networks | Prasoonkumar Surti, Narayan Srinivasa, Feng Chen, Joydeep Ray, Ben J. Ashbaugh +22 more | 2019-09-17 |
| 10417731 | Compute optimization mechanism for deep neural networks | Prasoonkumar Surti, Narayan Srinivasa, Feng Chen, Joydeep Ray, Ben J. Ashbaugh +22 more | 2019-09-17 |
| 10409319 | System, apparatus and method for providing a local clock signal for a memory array | Iqbal Rajwani, Altug Koker, Bhushan M. Borole, Kamal Sinha, Abhishek R. Appu +2 more | 2019-09-10 |
| 10324721 | Reducing aging of register file keeper circuits | Anupama A. Thaploo, Bhushan M. Borole, Bee Ngo, Iqbal Rajwani, Altug Koker +2 more | 2019-06-18 |
| 10319070 | Dynamic page sizing of page table entries | Abhishek R. Appu, Joydeep Ray, Altug Koker, Balaji Vembu, Prasoonkumar Surti +4 more | 2019-06-11 |
| 10262388 | Frequent data value compression for graphics processing units | Saurabh Sharma, Abhishek Venkatesh, Travis T. Schluessler, Prasoonkumar Surti, Altug Koker +9 more | 2019-04-16 |
| 10158346 | Pulse triggered flip flop | Bhushan M. Borole, Anupama A. Thaploo, Altug Koker, Abhishek R. Appu, Kamal Sinha | 2018-12-18 |
| 10157444 | Dynamic page sizing of page table entries | Abhishek R. Appu, Joydeep Ray, Altug Koker, Balaji Vembu, Prasoonkumar Surti +4 more | 2018-12-18 |
| 10102149 | Replacement policies for a hybrid hierarchical cache | Abhishek R. Appu, Joydeep Ray, James Valerio, Altug Koker, Prasoonkumar Surti +3 more | 2018-10-16 |
| 9250910 | Current change mitigation policy for limiting voltage droop in graphics logic | Linda L. Hurd, Josh B. Mastronarde, Pradeep K. Golconda, Shalini Sankar, Eric C. Samson | 2016-02-02 |
| 9164931 | Clamping of dynamic capacitance for graphics | Linda L. Hurd | 2015-10-20 |