Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7227377 | Apparatus and method for bus signal termination compensation during detected quiet cycle | Zelig Wayner, Tommy Bojan | 2007-06-05 |
| 7222254 | System and method for over-clocking detection of a processor utilizing a feedback clock rate setting | John W. Horigan | 2007-05-22 |
| 7216240 | Apparatus and method for address bus power control | Doron Orenstien, Marcelo Yuffe | 2007-05-08 |
| 7152167 | Apparatus and method for data bus power control | Doron Orenstien, Marcelo Yuffe | 2006-12-19 |
| 6842035 | Apparatus and method for bus signal termination compensation during detected quiet cycle | Zelig Wayner, Tommy Bojan | 2005-01-11 |
| 6647545 | Method and apparatus for branch trace message scheme | Roman Surgutchik, Oded Lempel, Ittai Anati, Haim Lustig | 2003-11-11 |
| 6463554 | Bus patcher | Gerald A. Budelman, William A. Hobbs, Stephen J. Peters, Nitin V. Sarangdhar, Kenneth B. Oliver | 2002-10-08 |
| 6331957 | Integrated breakpoint detector and associated multi-level breakpoint techniques | Ofer Nathan, John M. Zavertnik | 2001-12-18 |
| 6209053 | Method and apparatus for operating an adaptive multiplexed address and data bus within a computer system | — | 2001-03-27 |
| 5819027 | Bus patcher | Gerald A. Budelman, William A. Hobbs, Stephen J. Peters, Nitin V. Sarangdhar, Kenneth B. Oliver | 1998-10-06 |
| 5392285 | Cascading twisted pair ethernet hubs by designating one hub as a master and designating all other hubs as slaves | — | 1995-02-21 |