Issued Patents All Time
Showing 51–73 of 73 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8099523 | PCI express enhancements and extensions including transactions having prefetch parameters | Jasmin Ajanovic, Mahesh Wagh, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2012-01-17 |
| 8073981 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2011-12-06 |
| 8028295 | Apparatus, system, and method for persistent user-level thread | Gautham Chinya, Hong Wang, Shivnandan Kaushik, Bryant Bigbee, John Shen +6 more | 2011-09-27 |
| 8010969 | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | Richard Hankins, Gautham Chinya, Hong Wang, Shivnandan Kaushik, Bryant Bigbee +7 more | 2011-08-30 |
| 7949794 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2011-05-24 |
| 7930566 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2011-04-19 |
| 7899943 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2011-03-01 |
| 7810083 | Mechanism to emulate user-level multithreading on an OS-sequestered sequencer | Gautham Chinya, Hong Wang, Xiang Zou, James P. Held, Trung Diep +7 more | 2010-10-05 |
| 7743233 | Sequencer address management | Hong Wang, Gautham Chinya, Richard Hankins, Shivnandan Kaushik, Bryant Bigbee +13 more | 2010-06-22 |
| 7716395 | Low latency mechanism for data transfers between a media controller and a communication device | — | 2010-05-11 |
| 7490215 | Media memory system and method for providing concurrent memory access to a plurality of processors through separate translation table information | Brent S. Baxter, Clifford D. Hall, William H. Clifford | 2009-02-10 |
| 7231486 | General input/output architecture, protocol and related methods to support legacy interrupts | Jasmin Ajanovic, David J. Harriman, Randolph L. Campbell, Jose A. Vargas, Clifford D. Hall +1 more | 2007-06-12 |
| 7120711 | System and method for communicating over intra-hierarchy and inter-hierarchy links | Joseph A. Schaefer, David B. Minturn | 2006-10-10 |
| 7099961 | System including real-time data communication features | Carl First, Krishnan Rajamani | 2006-08-29 |
| 7065597 | Method and apparatus for in-band signaling of runtime general purpose events | Mohan J. Kumar, Sridhar Muthrasanallur | 2006-06-20 |
| 7036122 | Device virtualization and assignment of interconnect devices | Joseph A. Bennett, Randolph L. Campbell, Jose A. Vargas | 2006-04-25 |
| 6907510 | Mapping of interconnect configuration space | Joseph A. Bennett, Randolph L. Campbell, Jose A. Vargas | 2005-06-14 |
| 6865622 | System including real-time data communication features | Carl First, Krishnan Rajamani | 2005-03-08 |
| 6724390 | Allocating memory | Joseph M. Dragony | 2004-04-20 |
| 6615286 | Method and apparatus for updating device driver control data | Arie Chobotaro, David Borislav Girshovich, Michael W. Donlon, Israel Ramirez | 2003-09-02 |
| 6600493 | Allocating memory based on memory device organization | Arie Chobotaro, Murali Ramadoss, Roman Surgutchik | 2003-07-29 |
| 6545684 | Accessing data stored in a memory | Joseph M. Dragony | 2003-04-08 |
| 6370633 | Converting non-contiguous memory into contiguous memory for a graphics processor | — | 2002-04-09 |