Issued Patents All Time
Showing 201–225 of 244 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10481817 | Methods and apparatus to optimize dynamic memory assignments in multi-tiered memory systems | Andreas Kleen, Harshad S. Sane | 2019-11-19 |
| 10417218 | Techniques to achieve ordering among storage device transactions | Sanjeev N. Trika, Sridharan Sakthivelu | 2019-09-17 |
| 10409613 | Processing devices to perform a key value lookup instruction | Asit K. Mishra, Elmoustapha Ould-Ahmed-Vall, Deborah T. Marr | 2019-09-10 |
| 10334041 | Network interface device facilitating transaction assurance | Vadim Sukhomlinov, Namakkal N. Venkatesan, Roger Keith Wiles | 2019-06-25 |
| 10318291 | Providing vector horizontal compare functionality within a vector register | Elmoustapha Ould-Ahmed-Vall, Charles R. Yount, Suleyman Sair | 2019-06-11 |
| 10318295 | Transaction end plus commit to persistence instructions, processors, methods, and systems | Christopher J. Hughes | 2019-06-11 |
| 10303477 | Persistent commit processors, methods, systems, and instructions | — | 2019-05-28 |
| 10268502 | Methods and apparatus to perform atomic transactions in nonvolatile memory under hardware transactional memory | Vadim Sukhomlinov, Roman Dementiev | 2019-04-23 |
| 10268580 | Processors and methods for managing cache tiering with gather-scatter vector semantics | Namakkal N. Venkatesan, Ren Wang, Andrew J. Herdrich | 2019-04-23 |
| 10261688 | Performing search and replace operations in a memory device using command parameters and a storage controller without transferring data to a processor | Sanjeev N. Trika | 2019-04-16 |
| 10252696 | Restraint apparatus and method with alert | George J. Chaltas | 2019-04-09 |
| 10248488 | Fault tolerance and detection by replication of input data and evaluating a packed data execution result | Elmoustapha Ould-Ahmed-Vall, Suleyman Sair, Charles R. Yount | 2019-04-02 |
| 10241792 | Vector frequency expand instruction | Elmoustapha Ould-Ahmed-Vall, Suleyman Sair, Charles R. Yount, Bret L. Toll | 2019-03-26 |
| 10120814 | Apparatus and method for lazy translation lookaside buffer (TLB) coherence | Christopher J. Hughes | 2018-11-06 |
| 10095629 | Local and remote dual address decoding using caching agent and switch | Francesc Guim Bernat, Steen Larsen, Mark A. Schmisseur, Raj K. Ramanujan | 2018-10-09 |
| 10084724 | Technologies for transactional synchronization of distributed objects in a fabric architecture | Francesc Guim Bernat, Daniel Rivas Barragan | 2018-09-25 |
| 10067870 | Apparatus and method for low-overhead synchronous page table updates | Christopher J. Hughes | 2018-09-04 |
| 10015272 | Method and apparatus for compaction of data received over a network | Tao Zhong, Gang Deng, Ting Lou, Zhongyan Lu | 2018-07-03 |
| 9998483 | Service assurance and security of computing systems using fingerprinting | Vadim Sukhomlinov, Alex Nayshtut, Igor Muttik | 2018-06-12 |
| 9996361 | Byte and nibble sort instructions that produce sorted destination register and destination index mapping | Asit K. Mishra, Elmoustapha Ould-Ahmed-Vall, Deborah T. Marr | 2018-06-12 |
| 9971686 | Vector cache line write back processors, methods, systems, and instructions | Thomas Willhalm | 2018-05-15 |
| 9952941 | Elastic virtual multipath resource access using sequestered partitions | Rahul Khanna, Minh Le, Paul Dormitzer | 2018-04-24 |
| 9928063 | Instruction and logic to provide vector horizontal majority voting functionality | Elmoustapha Ould-Ahmed-Vall, Suleyman Sair, Charles R. Yount | 2018-03-27 |
| 9910669 | Instruction and logic for characterization of data access | Christopher J. Hughes | 2018-03-06 |
| 9846652 | Technologies for region-biased cache management | Vadim Sukhomlinov, Namakkal N. Venkatesan | 2017-12-19 |