Issued Patents All Time
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6862207 | Static random access memory | Liqiong Wei | 2005-03-01 |
| 6862225 | Buffer for a split cache line access | — | 2005-03-01 |
| 6816554 | Communication bus for low voltage swing data signals | — | 2004-11-09 |
| 6778444 | Buffer for a split cache line access | — | 2004-08-17 |
| 6775181 | Biasing technique for a high density SRAM | Ligiong Wei | 2004-08-10 |
| 6707752 | Tag design for cache access with redundant-form address | — | 2004-03-16 |
| 6650171 | Low power operation mechanism and method | Micah Barany, Krishnan Ravichandran, Bob Jackson | 2003-11-18 |
| 6621726 | Biasing technique for a high density SRAM | Liqiong Wei | 2003-09-16 |
| 6622267 | Method and apparatus for detecting multi-hit errors in cache | — | 2003-09-16 |
| 6518826 | Method and apparatus for dynamic leakage control | — | 2003-02-11 |
| 6507531 | Cache column multiplexing using redundant form addresses | — | 2003-01-14 |
| 6483375 | Low power operation mechanism and method | Micah Barany, Krishnan Ravichandran, Bob Jackson | 2002-11-19 |
| 6456121 | Sense amplifier for integrated circuits using PMOS transistors | — | 2002-09-24 |
| 6442089 | Multi-level, low voltage swing sensing scheme for high speed memory design | Thomas D. Fletcher | 2002-08-27 |
| 6407589 | Device for current sensing in an amplifier with PMOS voltage conversion | Liqiong Wei | 2002-06-18 |
| 6330182 | Method for evaluating soft error immunity of CMOS circuits | — | 2001-12-11 |
| 6292401 | Method and apparatus for global bitline multiplexing for a high-speed memory | Thomas D. Fletcher | 2001-09-18 |
| 6282143 | Multi-port static random access memory design for column interleaved arrays | John Wuu | 2001-08-28 |
| 6255861 | Hybrid low voltage swing sense amplifier | — | 2001-07-03 |
| 6204698 | Robust low voltage swing sense amplifier | — | 2001-03-20 |
| 6198684 | Word line decoder for dual-port cache memory | Thomas D. Fletcher, Mandar Joshi | 2001-03-06 |
| 6198656 | Asymmetric memory cell for single-ended sensing | — | 2001-03-06 |
| 6181608 | Dual Vt SRAM cell with bitline leakage control | Ali Keshavarzi, Yibin Ye, Vivek K. De | 2001-01-30 |
| 6087849 | Soft error immunity in CMOS circuits with large shared diffusion areas | — | 2000-07-11 |
| 6038693 | Error correction scheme for an integrated L2 cache | — | 2000-03-14 |