| 6833735 |
Single stage pulsed domino circuit for driving cascaded skewed static logic circuits |
Sudarshan Kumar, Snehal T Jariwala, Wenjie Jiang |
2004-12-21 |
| 6631093 |
Low power precharge scheme for memory bit lines |
Sudarshan Kumar, Wenjie Jiang, Gaurav Mehta, Sadhana Madhyastha |
2003-10-07 |
| 6628539 |
Multi-entry register cell |
Sudarshan Kumar, Gaurav Mehta, Sadhana Madhyastha |
2003-09-30 |
| 6629194 |
Method and apparatus for low power memory bit line precharge |
Sudarshan Kumar, Gaurav Mehta, Sadhana Madhyastha |
2003-09-30 |
| 6369616 |
Low power clock buffer with shared, precharge transistor |
Sudarshan Kumar |
2002-04-09 |
| 6341099 |
Reducing power consumption in a data storage device |
Sudarshan Kumar, Sadhana Madhyastha, Gaurav Mehta |
2002-01-22 |
| 6127850 |
Low power clock buffer with shared, clocked transistor |
Sudarshan Kumar |
2000-10-03 |
| 6124737 |
Low power clock buffer having a reduced, clocked, pull-down transistor |
Sudarshan Kumar, Kamal J. Koshy |
2000-09-26 |
| 6111435 |
Low power multiplexer with shared, clocked transistor |
Mahadevamurty Nemani, Narsing Vijayrao, Wenjie Jiang, Sudarshan Kumar |
2000-08-29 |