JV

James Valerio

IN Intel: 51 patents #617 of 30,777Top 3%
📍 North Plains, OR: #5 of 81 inventorsTop 7%
🗺 Oregon: #665 of 28,073 inventorsTop 3%
Overall (All Time): #52,014 of 4,157,543Top 2%
51
Patents All Time

Issued Patents All Time

Showing 26–50 of 51 patents

Patent #TitleCo-InventorsDate
11074109 Dynamic load balancing of compute assets among different compute contexts Vasanth Ranganathan, Joydeep Ray, Rahul A. KULKARNI, Abhishek R. Appu, Jeffery S. Boles +1 more 2021-07-27
10997686 Workload scheduling and distribution on a distributed graphics device Balaji Vembu, Brandon Fliflet, Michael Apodaca, Ben J. Ashbaugh, Hema Chand Nalluri +8 more 2021-05-04
10949945 Coarse grain coherency Joydeep Ray, Altug Koker, David Puffer, Abhishek R. Appu, Stephen Junkins 2021-03-16
10909037 Optimizing memory address compression Joydeep Ray, Abhishek R. Appu, Altug Koker, Prasoonkumar Surti 2021-02-02
10884932 Independent and separate entity-based cache Altug Koker, Joydeep Ray, Abhishek R. Appu, Vasanth Ranganathan 2021-01-05
10853132 Memory-based software barriers Altug Koker, Joydeep Ray, Balaji Vembu, Abhishek R. Appu 2020-12-01
10802967 Partial write management in a multi-tiled compute engine Joydeep Ray, Ben J. Ashbaugh, Lakshminarayanan Striramassarma 2020-10-13
10796667 Register spill/fill using shared local memory space Joydeep Ray, Altug Koker, Balaji Vembu, Murali Ramadoss, Guei-Yuan Lueh +7 more 2020-10-06
10796397 Facilitating dynamic runtime transformation of graphics processing commands for improved graphics performance at computing devices Abhishek Venkatesh, Satyajit Sarangi, Michael Apodaca, Thomas Raoux, Hashem Hashemi +1 more 2020-10-06
10796472 Method and apparatus for simultaneously executing multiple contexts on a graphics engine Michael Apodaca, Ankur N. Shah, Ben J. Ashbaugh, Brandon Fliflet, Hema Chand Nalluri +8 more 2020-10-06
10776897 System and method to support multiple walkers per command Vasanth Ranganathan, Joydeep Ray, Abhishek R. Appu, Ben J. Ashbaugh, Brandon Fliflet +3 more 2020-09-15
10691617 Replacement policies for a hybrid hierarchical cache Abhishek R. Appu, Joydeep Ray, Altug Koker, Prasoonkumar Surti, Balaji Vembu +3 more 2020-06-23
10657618 Coarse grain coherency Joydeep Ray, Altug Koker, David Puffer, Abhishek R. Appu, Stephen Junkins 2020-05-19
10657096 Switching crossbar for graphics pipeline Joydeep Ray, Altug Koker, Abhishek R. Appu, Vasanth Ranganathan 2020-05-19
10565675 Intelligent graphics dispatching mechanism Balaji Vembu, Murali Ramadoss, Guei-Yuan Lueh, Subramaniam Maiyuran, Abhishek R. Appu +4 more 2020-02-18
10521875 Thread scheduling over compute blocks for power optimization Altug Koker, Balaji Vembu, Joydeep Ray, Abhishek R. Appu 2019-12-31
10453427 Register spill/fill using shared local memory space Joydeep Ray, Altug Koker, Balaji Vembu, Murali Ramadoss, Guei-Yuan Lueh +7 more 2019-10-22
10402224 Microcontroller-based flexible thread scheduling launching in computing environments Kiran C. Veernapu, Kamlesh Pillai, Joydeep Ray, Abhishek R. Appu 2019-09-03
10373285 Coarse grain coherency Joydeep Ray, Altug Koker, David Puffer, Abhishek R. Appu, Stephen Junkins 2019-08-06
10324848 Independent and separate entity-based cache Altug Koker, Joydeep Ray, Abhishek R. Appu, Vasanth Ranganathan 2019-06-18
10310895 Memory-based software barriers Altug Koker, Joydeep Ray, Balaji Vembu, Abhishek R. Appu 2019-06-04
10235736 Intelligent graphics dispatching mechanism Balaji Vembu, Murali Ramadoss, Guei-Yuan Lueh, Subramaniam Maiyuran, Abhishek R. Appu +4 more 2019-03-19
10102149 Replacement policies for a hybrid hierarchical cache Abhishek R. Appu, Joydeep Ray, Altug Koker, Prasoonkumar Surti, Balaji Vembu +3 more 2018-10-16
10089115 Apparatus to optimize GPU thread shared local memory access Joydeep Ray, Abhishek R. Appu, Bharath Narasimha Swamy 2018-10-02
5546538 System for processing handwriting written by user of portable computer by server or processing by the computer when the computer no longer communicate with server David A. Cobbley, Frederick J. Pollack 1996-08-13