GT

Gregory F. Taylor

IN Intel: 50 patents #633 of 30,777Top 3%
BT Bipolar Integrated Technology: 3 patents #1 of 14Top 8%
📍 Portland, OR: #311 of 9,213 inventorsTop 4%
🗺 Oregon: #623 of 28,073 inventorsTop 3%
Overall (All Time): #49,376 of 4,157,543Top 2%
53
Patents All Time

Issued Patents All Time

Showing 26–50 of 53 patents

Patent #TitleCo-InventorsDate
6717455 Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation Usman Mughal, Razi Uddin, Chee How Lim, Songmin Kim 2004-04-06
6691241 Delay tuning to improve timing in multi-load systems 2004-02-10
6671847 I/O device testing method and apparatus Chi-Yeu Chao, Tawfik Arabi, Thomas D. Barrett 2003-12-30
6628157 Variable delay element for use in delay tuning of integrated circuits Ravishankar Kuppuswamy 2003-09-30
6584591 Timing control for input/output testability 2003-06-24
6573764 Method and apparatus for voltage-mode differential simultaneous bi-directional signaling 2003-06-03
6552570 Input circuit with non-delayed time blanking Chi-Yeu Chao 2003-04-22
6535047 Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation Usman Mughal, Razi Uddin, Chee How Lim, Songmin Kim 2003-03-18
6452502 Method and apparatus for early detection of reliability degradation of electronic devices Terrance Dishongh, David Pullen 2002-09-17
6453421 Processor system with power supply selection mechanism 2002-09-17
6410990 Integrated circuit device having C4 and wire bond connections George L. Geannopoulos 2002-06-25
6396309 Clocked sense amplifier flip flop with keepers to prevent floating nodes Cangsang Zhao, Chi-Yeu Chao 2002-05-28
6236695 Output buffer with timing feedback 2001-05-22
6208169 Internal clock jitter detector Keng L. Wong, Ravishankar Kuppuswamy, Douglas R. Parker, Hung-Piao Ma, Kent R. Callahan +1 more 2001-03-27
6157206 On-chip termination Jack Price, Chee How Lim 2000-12-05
6124755 Method and apparatus for biasing a charge pump Douglas R. Parker 2000-09-26
6085345 Timing control for input/output testability 2000-07-04
6075285 Semiconductor package substrate with power die George L. Geannopoulos, Larry E. Mosley 2000-06-13
5801561 Power-on initializing circuit Keng L. Wong, Roshan Fernando, Jeffrey E. Smith 1998-09-01
5748033 Differential power bus comparator Golnaz Kaveh, Jeffrey E. Smith 1998-05-05
5627736 Power supply noise filter 1997-05-06
5539337 Clock noise filter for integrated circuits Jeffrey E. Smith 1996-07-23
5399918 Large fan-in, dynamic, bicmos logic gate Lawrence T. Clark 1995-03-21
5345120 Swing limiting circuit for BiCMOS sense amplifiers 1994-09-06
5306964 Reference generator circuit for BiCMOS ECL gate employing PMOS load devices 1994-04-26