Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 6034543 | Programmable logic array structure having reduced parasitic loading | Jian Hui Huang, Ralph Portillo | 2000-03-07 | $430,213,000 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 6034543 | Programmable logic array structure having reduced parasitic loading | Jian Hui Huang, Ralph Portillo | 2000-03-07 | $430,213,000 |