Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7808989 | Multiple-domain processing system using hierarchically orthogonal switching fabric | Oleg Awsienko, Gary McAlpine, David B. Minturn, Joseph A. Schaefer, Gary Solomon | 2010-10-05 |
| 7447208 | Configuration access mechanism for packet switching architecture | David E. Mayhew, Todd Comins, Lynne M. Brocco, Joseph A. Schaefer, Gary Solomon | 2008-11-04 |
| 7443869 | Deadlock avoidance queuing mechanism | Gary Solomon, Joseph A. Schaefer, David E. Mayhew, Todd Comins, Lynne M. Brocco | 2008-10-28 |
| 7320080 | Power management over switching fabrics | Gary Solomon, Joseph A. Schaefer | 2008-01-15 |
| 7310319 | Multiple-domain processing system using hierarchically orthogonal switching fabric | Oleg Awsienko, Gary McAlpine, David B. Minturn, Joseph A. Schaefer, Gary Solomon | 2007-12-18 |
| 7283464 | Method and apparatus for a switch fabric in a data transport system | Oleg Awsienko | 2007-10-16 |
| 7038920 | System to mount electrical modules | Christopher J. Banyai, Karl H. Mauritz, Mark D. Summers | 2006-05-02 |
| 7023745 | Voltage detect mechanism | Peter Munguia | 2006-04-04 |
| 6944708 | Method of self-refresh in large memory arrays | David Frame | 2005-09-13 |
| 6113648 | Method and apparatus for protecting gate electrodes of target transistors in the gate array from gate charging by employing free transistors in the gate array | Mark E. Schuelein | 2000-09-05 |
| 5793069 | Apparatus for protecting gate electrodes of target transistors in a gate array from gate charging by employing free transistors in the gate array | Mark E. Schuelein | 1998-08-11 |