DP

David Puffer

IN Intel: 69 patents #393 of 30,777Top 2%
Micron: 3 patents #3,077 of 6,345Top 50%
📍 Tempe, AZ: #10 of 2,648 inventorsTop 1%
🗺 Arizona: #229 of 32,909 inventorsTop 1%
Overall (All Time): #27,405 of 4,157,543Top 1%
72
Patents All Time

Issued Patents All Time

Showing 51–72 of 72 patents

Patent #TitleCo-InventorsDate
10503652 Sector cache for compression Abhishek R. Appu, Altug Koker, Joydeep Ray, Prasoonkumar Surti, Lakshminarayanan Striramassarma +4 more 2019-12-10
10423415 Hierarchical general register file (GRF) for execution block Abhishek R. Appu, Altug Koker, Joydeep Ray, Kamal Sinha, Kiran C. Veernapu +7 more 2019-09-24
10380039 Apparatus and method for memory management in a graphics processing environment Niranjan L. Cooray, Satyeshwar Singh, Sameer Kp, Ankur N. Shah, Kun Tian +7 more 2019-08-13
10373285 Coarse grain coherency Joydeep Ray, Altug Koker, James Valerio, Abhishek R. Appu, Stephen Junkins 2019-08-06
10282812 Page faulting and selective preemption Altug Koker, Ingo Wald, Subramaniam Maiyuran, Prasoonkumar Surti, Balaji Vembu +4 more 2019-05-07
9542336 Isochronous agent data pinning in a multi-level memory system Marc Torrant, Blaise Fanning, Bryan R. White, Joydeep Ray, Neil Schaper +3 more 2017-01-10
8924756 Processor core with higher performance burst operation with lower power dissipation sustained workload mode Nikos Kaburlasos, Eric C. Samson, Lakshminarayan Jagannathan 2014-12-30
8656069 Peripheral interface alert message for downstream device Ajai Singh 2014-02-18
8346992 Peripheral interface alert message for downstream device Ajai Singh 2013-01-01
7979608 Lane to lane deskewing via non-data symbol processing for a serial point to point link Lyonel Renaud, Sarah Kotamreddy, Daren J. Schmidt, Suneel G. Mitbander 2011-07-12
7970958 Peripheral interface alert message for downstream device Ajai Singh 2011-06-28
7913001 Lane to lane deskewing via non-data symbol processing for a serial point to point link Lyonel Renaud, Sarah Kotamreddy, Daren J. Schmidt, Suneel G. Mitbander 2011-03-22
7631118 Lane to lane deskewing via non-data symbol processing for a serial point to point link Lyonel Renaud, Sarath Kotamreddy, Daren J. Schmidt, Suneel G. Mitbander 2009-12-08
7339995 Receiver symbol alignment for a serial point to point link Lyonel Renaud, Sarath Kotamreddy, Suneel G. Mitbander 2008-03-04
7327370 Memory controller hub interface Brian D. Possley, Kurt B. Robinson, Ray Askew, James Chapple, Thomas E. Dever, II 2008-02-05
7178045 Optimizing exit latency from an active power management state Suneel G. Mitbander, Sarath Kotamreddy 2007-02-13
7120765 Memory transaction ordering James M. Dodd 2006-10-10
7116331 Memory controller hub interface Brian D. Possley, Kurt B. Robinson, Ray Askew, James Chapple, Thomas E. Dever, II 2006-10-03
6871119 Filter based throttling Eric C. Samson, Aditya Navale 2005-03-22
6734862 Memory controller hub James Chapple, Tom Dever, Brian K. Langendorf, Cass A. Blodgett, Bryan R. White 2004-05-11
6125425 Memory controller performing a mid transaction refresh and handling a suspend signal Michael Cole 2000-09-26
5901298 Method for utilizing a single multiplex address bus between DRAM, SRAM and ROM T. Scott Cummins, Michael Cole, Scott Goble, Bruce A. Young 1999-05-04