Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417260 | Machine learning model scaling system with energy efficient network data transfer for power aware hardware | Juan Pablo Munoz, Souvik Kundu, Sharath Nittur Sridhar, Maciej Szankin | 2025-09-16 |
| 12367249 | Framework for optimization of machine learning architectures | Anthony Sarah, Juan Pablo Munoz, Tristan Webb | 2025-07-22 |
| 12130654 | Area-efficient scalable memory read-data multiplexing and latching | Amir Javidi, Glenn E. Starnes | 2024-10-29 |
| 11619963 | Area-efficient scalable memory read-data multiplexing and latching | Amir Javidi, Glenn E. Starnes | 2023-04-04 |
| 11029720 | Area-efficient scalable memory read-data multiplexing and latching | Amir Javidi, Glenn E. Starnes | 2021-06-08 |
| 10032507 | SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter | Hieu T. Ngo | 2018-07-24 |
| 9934844 | SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter | Hieu T. Ngo | 2018-04-03 |
| 9697887 | SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter | Hieu T. Ngo | 2017-07-04 |
| 9208860 | SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter | Hieu T. Ngo | 2015-12-08 |
| 8971097 | SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter | Hieu T. Ngo | 2015-03-03 |
| 8934314 | Apparatus and method for improving power delivery in a memory, such as, a random access memory | Mohammed H. Taufique, Hieu T. Ngo, Shantanu Ganguly | 2015-01-13 |
| 5332351 | Coil unloading and transportation apparatus and method | Jacqueline S. Nelson, Louis J. Wither, Elliot R. Lang | 1994-07-26 |