Issued Patents All Time
Showing 51–75 of 120 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7026847 | Programmable current booster for faster edge-rate output in high speed applications | Chiakang Sung, Khai Nguyen, Xiaobao Wang | 2006-04-11 |
| 6992947 | Dual-port SRAM in a programmable logic device | Philip Pan, Chiakang Sung, Joseph Huang, Khai Nguyen, Xiaobao Wang +3 more | 2006-01-31 |
| 6972593 | Method and apparatus for protecting a circuit during a hot socket condition | Xiaobao Wang, Khai Nguyen, Chiakang Sung | 2005-12-06 |
| 6956401 | Differential input buffers with elevated power supplies | Jeffrey Tyhach, Chiakang Sung, Khai Nguyen | 2005-10-18 |
| 6946872 | Multiple data rate interface architecture | Philip Pan, Chiakang Sung, Joseph Huang, Yan Chong | 2005-09-20 |
| 6911860 | On/off reference voltage switch for multiple I/O standards | Xiaobao Wang, Chiakang Sung, Khai Nguyen, Joseph Huang, Philip Pan +4 more | 2005-06-28 |
| 6888369 | Programmable on-chip differential termination impedance | Chiakang Sung, Khai Nguyen | 2005-05-03 |
| 6870413 | Schmitt trigger circuit with adjustable trip point voltages | Tzung-Chin Chang, Chiakang Sung, Khai Nguyen, Joseph Huang, Yan Chong +4 more | 2005-03-22 |
| 6870400 | Supply voltage detection circuit | Yan Chong, Chiakang Sung, Khai Nguyen, Joseph Huang, Xiaobao Wang +6 more | 2005-03-22 |
| 6853215 | Programmable I/O element circuit for high speed logic devices | Khai Nguyen, Chiakang Sung, Joseph Huang, Phillip Pan, In Whan Kim +4 more | 2005-02-08 |
| 6836164 | Programmable phase shift circuitry | Joseph Huang, Chiakang Sung, Xiaobao Wang, In Whan Kim, Wayne Yeung +1 more | 2004-12-28 |
| 6836151 | I/O cell configuration for multiple I/O standards | Cameron McClintock, Richard G. Cliff | 2004-12-28 |
| 6825698 | Programmable high speed I/O interface | Chiakang Sung, Joseph Huang, Khai Nguyen, Philip Pan | 2004-11-30 |
| 6825692 | Input buffer for multiple differential I/O standards | Jonathan Chung, In Whan Kim, Philip Pan, Chiakang Sung, Xiaobao Wang +5 more | 2004-11-30 |
| 6806733 | Multiple data rate interface architecture | Philip Pan, Chiakang Sung, Joseph Huang, Yan Chong | 2004-10-19 |
| 6798237 | On-chip impedance matching circuit | Xiaobao Wang, Chiakang Sung, Khai Nguyen | 2004-09-28 |
| 6766505 | Parallel programming of programmable logic using register chains | Gopi Rangan, Khai Nguyen, Chiakang Sung, Xiaobao Wang, In Whan Kim +3 more | 2004-07-20 |
| 6747903 | Configurable decoder for addressing a memory | Philip Pan, Chiakang Sung, Joseph Huang, Khai Nguyen, Xiaobao Wang +4 more | 2004-06-08 |
| 6731137 | Programmable, staged, bus hold and weak pull-up for bi-directional I/O | Gopinath Rangan, Chiakang Sung, Xiaobao Wang, Philip Pan, Yan Chong +4 more | 2004-05-04 |
| 6731142 | Circuit for providing clock signals with low skew | Chiakang Sung, Khai Nguyen, Joseph Huang, Xiaobao Wang, In Whan Kim +4 more | 2004-05-04 |
| 6714044 | Hi-speed parallel configuration of programmable logic | Gopi Rangan, Khai Nguyen, Chiakang Sung, Xiaobao Wang, In Whan Kim +3 more | 2004-03-30 |
| 6714050 | I/O cell configuration for multiple I/O standards | Cameron McClintock, Richard G. Cliff | 2004-03-30 |
| 6691267 | Technique to test an integrated circuit using fewer pins | Khai Nguyen, Chiakang Sung, Joseph Huang, Xiaobao Wang | 2004-02-10 |
| 6686769 | Programmable I/O element circuit for high speed logic devices | Khai Nguyen, Chiakang Sung, Joseph Huang, Phillip Pan, In Whan Kim +4 more | 2004-02-03 |
| 6681378 | Programming mode selection with JTAG circuits | Xiaobao Wang, Chiakang Sung, Joseph Huang, Khai Nguyen, Richard G. Cliff | 2004-01-20 |