| 9082199 |
Video processing architecture |
Roger May |
2015-07-14 |
| 9053777 |
Methods and apparatus for memory interface systems |
Clive Evan Davies |
2015-06-09 |
| 8607105 |
Memory test circuit and memory test techniques |
Adam Titley |
2013-12-10 |
| 7657689 |
Methods and apparatus for handling reset events in a bus bridge |
Andrew Draper |
2010-02-02 |
| 7350013 |
Bus communication apparatus for programmable logic devices and associated methods |
— |
2008-03-25 |
| 7350178 |
Embedded processor with watchdog timer for programmable logic |
Roger May, Edward Flaherty, Andrew Draper |
2008-03-25 |
| 7340596 |
Embedded processor with watchdog timer for programmable logic |
Roger May, Edward Flaherty, Andrew Draper |
2008-03-04 |
| 7263623 |
Microprocessor system |
James Tyson, Fabio Petrassem de Sousa, Andrew Draper |
2007-08-28 |
| 7064578 |
Distributed bus structure |
Roger May, Stephane Caneau, Andrew Draper, Edward Flaherty |
2006-06-20 |
| 7062589 |
Bus communication apparatus for programmable logic devices and associated methods |
— |
2006-06-13 |
| 7026840 |
Programmable logic device |
Roger May, Edward Flaherty |
2006-04-11 |
| 6937061 |
Address decoder for programmable logic device |
Roger May, Stephane Cauneau, Andrew Draper, Edward Flaherty |
2005-08-30 |
| 6363438 |
Method of controlling DMA command buffer for holding sequence of DMA commands with head and tail pointers |
Emrys J. Williams |
2002-03-26 |
| 6330631 |
Data alignment between buses |
— |
2001-12-11 |
