Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
TM

Ta-Chung Ma

ITIntegrated Device Technology: 1 patents #441 of 758Top 60%
San Jose, CA: #22,480 of 32,062 inventorsTop 75%
California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,426,982 of 4,157,543Top 85%
1 Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
7099231 Interleaving memory blocks to relieve timing bottleneck in a multi-queue first-in first-out memory system Mario Au, Jason Z. Mo, Lan Lin 2006-08-29