PB

Philip A. Bourekas

IT Integrated Device Technology: 12 patents #33 of 758Top 5%
Overall (All Time): #388,502 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7133951 Alternate set of registers to service critical interrupts and operating system traps 2006-11-07
6598050 Apparatus and method for limited data sharing in a multi-tasking system 2003-07-22
6128703 Method and apparatus for memory prefetch operation of volatile non-coherent data Tuan Luong, Michael J. Miller 2000-10-03
5894176 Flexible reset scheme supporting normal system operation, test and emulation modes Avigdor Willenz, Yeshayahu Mor 1999-04-13
5694567 Direct-mapped cache with cache locking allowing expanded contiguous memory storage by swapping one or more tag bits with one or more index bits Andrew Ng 1997-12-02
5649232 Structure and method for multiple-level read buffer supporting optimal throttled read operations by regulating transfer rate Avigdor Willenz, Yeshayahu Mor, Scott Revak 1997-07-15
5636363 Hardware control structure and method for off-chip monitoring entries of an on-chip cache Yeshayahu Mor, Scott Revak 1997-06-03
5553268 Memory operations priority scheme for microprocessors Avigdor Willenz, Yehayahu Mor 1996-09-03
5517659 Multiplexed status and diagnostic pins in a microprocessor with on-chip caches Yeshayahu Mor, Scott Revak, Avigdor Willenz 1996-05-14
5386579 Minimum pin-count multiplexed address/data bus with byte enable and burst address counter support microprocessor transmitting byte enable signals on multiplexed address/data bus having burst address counter for supporting signal datum and burst transfer Avigdor Willenz, Yeshayahu Mor, Danh LeNgoc, Scott Revak 1995-01-31
5343435 Use of a data register to effectively increase the efficiency of an on-chip write buffer Danh Le Ngoc, Scott Revak 1994-08-30
5317711 Structure and method for monitoring an internal cache Yeshayahu Mor, Scott Revak 1994-05-31
5175859 Apparatus for disabling unused cache tag input/output pins during processor reset by sensing pull-down resistors connected to disabled pins Michael J. Miller, Avigdor Willenz 1992-12-29