Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6469563 | Circuit configuration for compensating runtime and pulse-duty-factor differences between two input signals | Thoai-Thai Le | 2002-10-22 |
| 6388944 | Memory component with short access time | Peter Schrogmeier, Stefan Dietrich, Torsten Partsch, Thomas Hein, Thilo Marx | 2002-05-14 |
| 6366527 | Circuit configuration for generating an output clock signal with optimized signal generation time | Thomas Hein, Thilo Marx, Torsten Partsch | 2002-04-02 |
| 6351167 | Integrated circuit with a phase locked loop | Thomas Hein, Thilo Marx, Torsten Partsch | 2002-02-26 |
| 6307416 | Integrated circuit for producing two output clock signals at levels which do not overlap in time | Thoralf Graetz, Dieter Harle | 2001-10-23 |
| 6285176 | Voltage generator with superimposed reference voltage and deactivation signals | Thilo Marx, Torsten Partsch, Thomas Hein | 2001-09-04 |
| 6285228 | Integrated circuit for generating a phase-shifted output clock signal from a clock signal | Thomas Hein, Torsten Partsch, Thilo Marx | 2001-09-04 |
| 6259652 | Synchronous integrated memory | Thomas Hein, Torsten Partsch, Thilo Marx | 2001-07-10 |
| 6198328 | Circuit configuration for producing complementary signals | Thoralf Gratz, Dieter Harle, Bret Johnson | 2001-03-06 |
| 6194928 | Integrated circuit with adjustable delay unit | — | 2001-02-27 |
| 6191985 | Dynamic memory having two modes of operation | Thoralf Gratz, Dieter Harle, Helmut Schneider | 2001-02-20 |
| 6191627 | Integrated circuit having adjustable delay units for clock signals | — | 2001-02-20 |
| 6125066 | Circuit configuration and method for automatic recognition and elimination of word line/bit line short circuits | Thoralf Gratz, Dieter Harle | 2000-09-26 |
| 6060908 | Databus | Dieter Haerle, Thoralf Graetz | 2000-05-09 |