Issued Patents All Time
Showing 26–50 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7359278 | Method for producing an integrated memory module | — | 2008-04-15 |
| 7330053 | Prestage for an off-chip driver (OCD) | Paul Brucke | 2008-02-12 |
| 7323936 | Input circuit for receiving an input signal, and a method for adjusting an operating point of an input circuit | Rory Dickman | 2008-01-29 |
| 7317657 | Semiconductor memory device, system with semiconductor memory device, and method for operating a semiconductor memory device | Martin Brox | 2008-01-08 |
| 7317603 | Integrated circuit with electrostatic discharge protection | Jürgen Lindolf, Michael Sommer | 2008-01-08 |
| 7278072 | Method and auxiliary device for testing a RAM memory circuit | Johann Pfeiffer | 2007-10-02 |
| 7180286 | Hand-held device for non-destructive thickness measurement | Bernhard Scherzinger | 2007-02-20 |
| 7076021 | Apparatus for measurement of the thickness of thin layers | Volker Rössiger | 2006-07-11 |
| 7072233 | Method and apparatus for optimizing the functioning of DRAM memory elements | Ruediger Brede, Dominique Savignac | 2006-07-04 |
| 7064999 | Digital memory circuit having a plurality of memory banks | Ullrich Menczigar, Johann Pfeiffer | 2006-06-20 |
| 7009908 | Decoding device | — | 2006-03-07 |
| 7008810 | Method for fabricating at least one mesa or ridge structure or at least one electrically pumped region in a layer or layer sequence | Christine Höss, Andreas Weimar, Andreas Leber, Alfred Lell, Volker Harle | 2006-03-07 |
| 6986088 | Method and apparatus for reducing the current consumption of an electronic circuit | Johann Pfeiffer, Rainer Florian Schnabel | 2006-01-10 |
| 6937537 | Semiconductor memory with address decoding unit, and address loading method | Johann Pfeiffer | 2005-08-30 |
| 6930540 | Integrated circuit with voltage divider and buffered capacitor | Michael Sommer | 2005-08-16 |
| 6928024 | RAM memory circuit and method for memory operation at a multiplied data rate | Johann Pfeiffer | 2005-08-09 |
| 6920074 | Method for reading a memory cell in a semiconductor memory, and semiconductor memory | Kazimierz Szczypinski | 2005-07-19 |
| 6903620 | Circuit configuration for setting the input resistance and the input capacitance of an integrated semiconductor circuit chip | Ullrich Menczigar | 2005-06-07 |
| 6903423 | Integrated semiconductor memory and method for reducing leakage currents in an integrated semiconductor | Jens Egerer | 2005-06-07 |
| 6859411 | Circuit and method for writing and reading data from a dynamic memory circuit | Johann Pfeiffer | 2005-02-22 |
| 6824657 | Component support | — | 2004-11-30 |
| 6822923 | RAM memory circuit and method for controlling the same | Johann Pfeiffer | 2004-11-23 |
| 6788228 | Addressing device for selecting regular and redundant elements | Alan Morgan | 2004-09-07 |
| 6788606 | Method and apparatus for refreshing memory cells | Heiko Fibranz | 2004-09-07 |
| 6787801 | Wafer with additional circuit parts in the kerf area for testing integrated circuits on the wafer | Alan Morgan | 2004-09-07 |