Issued Patents All Time
Showing 201–225 of 246 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6498357 | Lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process | Chyh-Yih Chang, Tien-Hao Tang | 2002-12-24 |
| 6465848 | Low-voltage-triggered electrostatic discharge protection device and relevant circuitry | Geeng-Lih Lin | 2002-10-15 |
| 6465768 | MOS structure with improved substrate-triggered effect for on-chip ESD protection | Tung-Yang Chen, Tien-Hao Tang | 2002-10-15 |
| 6465283 | Structure and fabrication method using latch-up implantation for improving latch-up immunity in CMOS fabrication process | Chyh-Yih Chang, Hsin-Chin Jiang, Jeng-Jie Peng | 2002-10-15 |
| 6448641 | Low-capacitance bonding pad for semiconductor device | Hsin-Chin Jiang | 2002-09-10 |
| 6444295 | Method for improving integrated circuits bonding firmness | Jeng-Jie Peng, Nien-Ming Wang | 2002-09-03 |
| 6444404 | Method of fabricating ESD protection device by using the same photolithographic mask for both the ESD implantation and the silicide blocking regions | Tung-Yang Chen, Hun-Hsien Chang | 2002-09-03 |
| 6437407 | Charged device model electrostatic discharge protection for integrated circuits | Chyh-Yih Chang | 2002-08-20 |
| 6420774 | Low junction capacitance semiconductor structure and I/O buffer | Geeng-Lih Lin | 2002-07-16 |
| 6392860 | Electrostatic discharge protection circuit with gate-modulated field-oxide device | Geeng-Lih Lin | 2002-05-21 |
| 6388850 | Gate-coupled ESD protection circuit without transient leakage | Chen-Chia Wang, Hun-Hsien Chang | 2002-05-14 |
| 6355960 | ESD protection for open drain I/O pad in integrated circuit with parasitic field FET devices | Geeng-Lih Lin | 2002-03-12 |
| 6335698 | Programmable analog-to-digital converter with programmable non-volatile memory cells | Hsin-Chin Jiang | 2002-01-01 |
| 6316805 | Electrostatic discharge device with gate-controlled field oxide transistor | Geeng-Lih Lin | 2001-11-13 |
| 6274911 | CMOS device with deep current path for ESD protection | Geeng-Lih Lin | 2001-08-14 |
| 6249410 | ESD protection circuit without overstress gate-driven effect | Hun-Hsien Chang | 2001-06-19 |
| 6169001 | CMOS device with deep current path for ESD protection | Geeng-Lih Lin | 2001-01-02 |
| 6144542 | ESD bus lines in CMOS IC's for whole-chip ESD protection | Hun-Hsien Chang | 2000-11-07 |
| 6075686 | ESD protection circuit for mixed mode integrated circuits with separated power pins | — | 2000-06-13 |
| 6072219 | Substrate-triggering electrostatic discharge protection circuit for deep-submicron integrated circuits | Tung-Yang Chen, Chung-Yu Wu | 2000-06-06 |
| 6046087 | Fabrication of ESD protection device using a gate as a silicide blocking mask for a drain region | Geeng-Lih Lin | 2000-04-04 |
| 6034552 | Output ESD protection using dynamic-floating-gate arrangement | Hun-Hsin Chang, Kuo-Tsai Lee, Wen-Hsiang Huang | 2000-03-07 |
| 6011681 | Whole-chip ESD protection for CMOS ICs using bi-directional SCRs | Hun-Hsien Chang | 2000-01-04 |
| 6008684 | CMOS output buffer with CMOS-controlled lateral SCR devices | Hun-Hsien Chang | 1999-12-28 |
| 6002568 | ESD protection scheme for mixed-voltage CMOS integrated circuits | Hun-Hsien Chang | 1999-12-14 |