Issued Patents All Time
Showing 151–175 of 246 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6927602 | Mixed-voltage CMOS I/O buffer with thin oxide device and dynamic n-well bias circuit | Chia-Sheng Tsai, Che-Hao Chuang | 2005-08-09 |
| 6920026 | ESD protection circuit with whole-chip ESD protection | Zi-Ping Chen, Chyh-Yih Chang | 2005-07-19 |
| 6912109 | Power-rail ESD clamp circuits with well-triggered PMOS | Mau-Lin Wu | 2005-06-28 |
| 6903913 | ESD protection circuit for mixed-voltage I/O ports using substrated triggering | Chien-Hui Chuan | 2005-06-07 |
| 6894324 | Silicon-on-insulator diodes and ESD protection circuits | Kei-Kang Hung, Tien-Hao Tang | 2005-05-17 |
| 6885534 | Electrostatic discharge protection device for giga-hertz radio frequency integrated circuits with varactor-LC tanks | Cheng-Ming Lee, Wen-Yu Lo | 2005-04-26 |
| 6885179 | Low-voltage bandgap reference | Ching-Yun Chu, Wen-Yu Lo | 2005-04-26 |
| 6885529 | CDM ESD protection design using deep N-well structure | Hun-Hsien Chang, Wen-Tai Wang | 2005-04-26 |
| 6882009 | Electrostatic discharge protection device and method of manufacturing the same | Tang-Kui Tseng, Hsin-Chin Jiang, Chyh-Yih Chang, Jeng-Jie Peng | 2005-04-19 |
| 6867957 | Stacked-NMOS-triggered SCR device for ESD-protection | Paul C. F. Tong, Ping Ping Xu | 2005-03-15 |
| 6867461 | ESD protection circuit | Kun-Hsien Lin | 2005-03-15 |
| 6861680 | Silicon-on-insulator diodes and ESD protection circuits | Kei-Kang Hung, Tien-Hao Tang | 2005-03-01 |
| 6858901 | ESD protection circuit with high substrate-triggering efficiency | Kuo-Chun Hsu | 2005-02-22 |
| 6838734 | ESD implantation in deep-submicron CMOS technology for high-voltage-tolerant applications | Tung-Yang Chen, Hun-Hsien Chang | 2005-01-04 |
| 6838908 | Mixed-voltage I/O design with novel floating N-well and gate-tracking circuits | Che-Hao Chuang, Kuo-Chung Lee, Hsin-Chin Jiang | 2005-01-04 |
| 6815775 | ESD protection design with turn-on restraining method and structures | Jeng-Jie Peng, Hsin-Chin Jiang | 2004-11-09 |
| 6806160 | Method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process | Chyh-Yih Chang, Tien-Hao Tang | 2004-10-19 |
| 6768619 | Low-voltage-triggered SOI-SCR device and associated ESD protection circuit | Kei-Kang Hung, Shao-Chang Huang | 2004-07-27 |
| 6765771 | SCR devices with deep-N-well structure for on-chip ESD protection circuits | Hun-Hsien Chang, Wen-Tai Wang | 2004-07-20 |
| 6750517 | Device layout to improve ESD robustness in deep submicron CMOS technology | Mau-Lin Wu | 2004-06-15 |
| 6750515 | SCR devices in silicon-on-insulator CMOS process for on-chip ESD protection | Kei-Kang Hung, Chyh-Yih Chang | 2004-06-15 |
| 6747501 | Dual-triggered electrostatic discharge protection circuit | Kei-Kang Hung, Hsin-Chin Jiang | 2004-06-08 |
| 6747861 | Electrostatic discharge protection for a mixed-voltage device using a stacked-transistor-triggered silicon controlled rectifier | Chien-Hui Chung, Hsin-Chin Jiang | 2004-06-08 |
| 6744107 | ESD protection circuit with self-triggered technique | Kuo-Chun Hsu, Wen-Yu Lo | 2004-06-01 |
| 6724592 | Substrate-triggering of ESD-protection device | Paul C. F. Tong, Ping Ping Xu, Kwong Shing Lin, Anna Tam | 2004-04-20 |